Datasheet
LMH0030
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SNLS219G –JANUARY 2006–REVISED APRIL 2013
TEST MODE 0 REGISTER (Address 55h)
The four bits of this register are intended for use as test mode functions. They are not normal operating modes.
The bits may be set (enabled) or reset (disabled) by writing to the register. Reading this register sets (enables)
all bits to their default ON condition.
The Scrambler_Enable bit enables operation of the SMPTE scrambler function. This bit is normally ON.
The NRZI_Enable bit enables operation of the NRZ-to-NRZI conversion function. This bit is normally ON.
The LSB_Clipping bit enables operation of the LSB clipping function. This bit is normally ON.
The Sync_Detect_Enable bit enables operation of the TRS detector function. This bit is normally ON.
Table 5. Test Pattern Selection Codes
(1)
Test Pattern Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Select Word
Bits >
1=HD 1=Progressive 00=Black
0=Interlaced 01=PLL Path.
Video Raster
Standard
0=SD 1=PAL 10=EQ Path.
0=NTSC 11=color Bars
1125 Line, 74.25 MHz, 30 Frame Interlaced Component (SMPTE 260M)
Ref. Black 1 0 0 0 0 0
PLL Path. 1 0 0 0 0 1
EQ Path. 1 0 0 0 1 0
color Bars 1 0 0 0 1 1
1125 Line, 74.25 MHz, 30 Frame Interlaced Component (SMPTE 274M)
Ref. Black 1 0 0 1 0 0
PLL Path. 1 0 0 1 0 1
EQ Path. 1 0 0 1 1 0
color Bars 1 0 0 1 1 1
1125 Line, 74.25 MHz, 25 Frame Interlaced Component (SMPTE 274M)
Ref. Black 1 0 1 0 0 0
PLL Path. 1 0 1 0 0 1
EQ Path. 1 0 1 0 1 0
color Bars 1 0 1 0 1 1
1125 Line, 74.25 MHz, 25 Frame Interlaced Component (SMPTE 295M)
Ref. Black 1 0 1 1 0 0
PLL Path. 1 0 1 1 0 1
EQ Path. 1 0 1 1 1 0
color Bars 1 0 1 1 1 1
1125 Line, 74.25 MHz, 30 Frame Progressive Component (SMPTE 274M)
Ref. Black 1 1 0 0 0 0
PLL Path. 1 1 0 0 0 1
EQ Path. 1 1 0 0 1 0
color Bars 1 1 0 0 1 1
1125 Line, 74.25 MHz, 25 Frame Progressive Component (SMPTE 274M)
Ref. Black 1 1 0 1 0 0
PLL Path. 1 1 0 1 0 1
EQ Path. 1 1 0 1 1 0
color Bars 1 1 0 1 1 1
(1) Note: SD BIST patterns are NTSC 4x3 color Bars and PAL 4x3 PLL Pathological. HD BIST patterns are color bars for each format.
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