Datasheet

LMH0030
SNLS219G –JANUARY 2006–REVISED APRIL 2013 www.ti.com
Table 2. Control Register Bit Assignments (continued)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
reserved reserved PIN 1 SEL[5] PIN 1 SEL[4] PIN 1 SEL[3] PIN 1 SEL[2] PIN 1 SEL[1] PIN 1 SEL[0]
I/O PIN 2 CONFIG (register address 11h)
reserved reserved PIN 2 SEL[5] PIN 2 SEL[4] PIN 2 SEL[3] PIN 2 SEL[2] PIN 2 SEL[1] PIN 2 SEL[0]
I/O PIN 3 CONFIG (register address 12h)
reserved reserved PIN 3 SEL[5] PIN 3 SEL[4] PIN 3 SEL[3] PIN 3 SEL[2] PIN 3 SEL[1] PIN 3 SEL[0]
I/O PIN 4 CONFIG (register address 13h)
reserved reserved PIN 4 SEL[5] PIN 4 SEL[4] PIN 4 SEL[3] PIN 4 SEL[2] PIN 4 SEL[1] PIN 4 SEL[0]
I/P PIN 5 CONFIG (register address 14h)
reserved reserved PIN 5 SEL[5] PIN 5 SEL[4] PIN 5 SEL[3] PIN 5 SEL[2] PIN 5 SEL[1] PIN 5 SEL[0]
I/O PIN 6 CONFIG (register address 15h)
reserved reserved PIN 6 SEL[5] PIN 6 SEL[4] PIN 6 SEL[3] PIN 6 SEL[2] PIN 6 SEL[1] PIN 6 SEL[0]
I/O PIN 7 CONFIG (register address 16h)
reserved reserved PIN 7 SEL[5] PIN 7 SEL[4] PIN 7 SEL[3] PIN 7 SEL[2] PIN 7 SEL[1] PIN 7 SEL[0]
TEST MODE 0 (register address 55h)
SYNC DETECT LSB SCRAMBLER
reserved reserved reserved NRZI ENABLE reserved
ENABLE CLIPPING ENABLE
Table 3. Control Register Addresses
Address Address
Register Name
Decimal Hexadecimal
EDH 0 1 01
EDH 1 2 02
EDH 2 3 03
ANC 0 4 04
ANC 1 5 05
ANC 2 6 06
ANC 3 7 07
ANC 4 8 08
ANC 5 23 17
ANC 6 24 18
SWITCH POINT 0 9 09
SWITCH POINT 1 10 0A
SWITCH POINT 2 25 19
SWITCH POINT 3 26 1A
FORMAT 0 11 0B
FORMAT 1 12 0C
TEST 0 13 0D
VIDEO INFO 0 14 0E
I/O PIN 0 CONFIG 15 0F
I/O PIN 1 CONFIG 16 10
I/O PIN 2 CONFIG 17 11
I/O PIN 3 CONFIG 18 12
I/O PIN 4 CONFIG 19 13
I/O PIN 5 CONFIG 20 14
I/O PIN 6 CONFIG 21 15
I/O PIN 7 CONFIG 22 16
TEST MODE 0 85 55
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