Datasheet

LMH0030
SD/HD Encoder/ Serializer/
Cable Driver
LMH0034
Adaptive Cable
Equalizer
75: Coaxial Cable
1PF
75:
1%
SMPTE Video
Data Input
SMPTE 292M
or 259M
Serial Data
V
DD
LMH0031
SD/HD Decoder/
Deserializer
Parallel Ancilliary
Data Input
SMPTE Video
Data Output
Parallel Ancilliary
Data Output
75:
1%
1PF
LMH0030
SNLS219G –JANUARY 2006–REVISED APRIL 2013 www.ti.com
DESCRIPTION (CONTINUED)
The LMH0030 performs functions which include: parallel-to-serial data conversion, SMPTE standard data
encoding, NRZ to NRZI data format conversion, serial data clock generation and encoding with the serial data,
automatic video rate and format detection, ancillary data packet management and insertion, and serial data
output driving. The LMH0030 has circuitry for automatic EDH/CRC character and flag generation and insertion
per SMPTE RP-165 (standard definition) or SMPTE 292M (high definition). Optional LSB dithering is
implemented which prevents pathological pattern generation. Unique to the LMH0030 are its video and ancillary
data FIFOs. The video FIFO allows the video data to be delayed from 0 to 4 parallel data clock periods for video
timing purposes. The ancillary data port and on-chip FIFO and control circuitry store and insert ancillary flags,
data packets and checksums into the ancillary data space. The LMH0030 also has an exclusive built-in self-test
(BIST) and video test pattern generator (TPG) with SD and HD component video test patterns: reference black,
PLL and EQ pathologicals and color bars in 4:3 and 16:9 raster formats for NTSC and PAL standards*. The color
bar patterns feature optional bandwidth limiting coding in the chroma and luma transitions.
The LMH0030 has a unique multi-function I/O port for immediate access to control and configuration settings.
This port may be programmed to provide external access to control functions and indicators as inputs and
outputs. The designer can thus customize the LMH0030 to fit the desired application. At power-up or after a reset
command, the LMH0030 is auto-configured to a default operating condition. Separate power pins for the output
driver, PLL and the serializer improve power supply rejection, output jitter and noise performance.
The LMH0030's internal circuitry is powered from +2.5V and the I/O circuitry from a +3.3V supply. Power
dissipation is typically 430mW at 1.485 Gbps including two 75Ω AC-coupled and back-matched output loads. The
device is packaged in a 64-pin TQFP.
Typical Application
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