Datasheet

LMC6064
SNOS656D –AUGUST 2000–REVISED MARCH 2013 www.ti.com
Low-Leakage Sample and Hold
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)(3)
Differential Input Voltage ±Supply Voltage
Voltage at Input/Output Pin (V
+
) +0.3V,
(V
−
) −0.3V
Supply Voltage (V
+
− V
−
) 16V
Output Short Circuit to V
+
See
(4)
Output Short Circuit to V
−
See
(5)
Lead Temperature (Soldering, 10 sec.) 260°C
Storage Temp. Range −65°C to +150°C
Junction Temperature 150°C
ESD Tolerance
(6)
2 kV
Current at Input Pin ±10 mA
Current at Output Pin ±30 mA
Current at Power Supply Pin 40 mA
Power Dissipation See
(7)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) For ensured Military Temperature Range parameters see RETSMC6064X.
(4) Do not connect output to V
+
, when V
+
is greater than 13V or reliability witll be adversely affected.
(5) Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(6) Human body model, 1.5 kΩ in series with 100 pF.
(7) The maximum power dissipation is a function of T
J(Max)
, θ
JA
, and T
A
. The maximum allowable power dissipation at any ambient
temperature is P
D
= (T
J(Max)
− T
A
)/θ
JA
.
Operating Ratings
(1)
Temperature Range LMC6064AM −55°C ≤ T
J
≤ +125°C
LMC6064AI, LMC6064I −40°C ≤ T
J
≤ +85°C
Supply Voltage 4.5V ≤ V
+
≤ 15.5V
Thermal Resistance (θ
JA
)
(2)
14-Pin PDIP 81°C/W
14-Pin SOIC 126°C/W
Power Dissipation See
(3)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) All numbers apply for packages soldered directly into a PC board.
(3) For operating at elevated temperatures the device must be derated based on the thermal resistance θ
JA
with P
D
= (T
J
–T
A
)/θ
JA
.
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