Datasheet

LMC6044
SNOS612D –NOVEMBER 1994–REVISED MARCH 2013 www.ti.com
Absolute Maximum Ratings
(1)(2)
Differential Input Voltage ±Supply Voltage
Supply Voltage (V
+
− V
−
) 16V
Output Short Circuit to V
+
See
(3)
Output Short Circuit to V
−
See
(4)
Lead Temperature (Soldering, 10 sec.) 260°C
Current at Input Pin ±5 mA
Current at Output Pin ±18 mA
Current at Power Supply Pin 35 mA
Power Dissipation See
(5)
Storage Temperature Range −65°C to +150°C
Junction Temperature
(5)
110°C
ESD Tolerance
(6)
500V
Voltage at I/O Pin (V
+
) +0.3V, (V
−
) −0.3V
(1) Absolute Maximum Ratings indicate limts beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Do not connect output to V
+
when V
+
is greater than 13V or reliability may be adversely affected.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 110°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(5) The maximum power dissipation is a function of T
J(max)
, θ
JA
, and T
A
. The maximum allowable power dissipation at any ambient
temperature is P
D
= (T
J(max)
− T
A
)/θ
JA
.
(6) Human body model, 1.5 kΩ in series with 100 pF.
Operating Ratings
LMC6044AI, LMC6044I −40°C ≤ T
J
≤ +85°C
Temperature Range
Supply Voltage 4.5V ≤ V+ ≤ 15.5V
14-Pin PDIP 85°C/W
Thermal Resistance (θ
JA
)
(1)
14-Pin SOIC 115°C/W
Power Dissipation See
(2)
(1) All numbers apply for packages soldered directly into a PC poard.
(2) For operating at elevated temperatures, the device must be derated based on the thermal resistance θ
JA
with P
D
= (T
J
− T
A
)/θ
JA
.
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