Datasheet
LM97593
www.ti.com
SNWS019B –JULY 2007–REVISED APRIL 2013
LM97593 Electrical Characteristics (continued)
Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = D18GND = 0V, V
A
= V
D
= V
DR
=
+3.3V, V
D18
= +1.8V, Internal V
REF
= +1.0V, f
CLK
= 65 MHz, V
CM
= V
COM
, t
R
= t
F
= 1 ns, C
L
= 5 pF/pin. The ADC’s 11 most
significant bits observed at the mixer output debug tap with NCO = 0Hz. Typical values are for T
A
= 25°C. Boldface limits
apply for T
MIN
≤ T
A
≤ T
MAX
. All other limits apply for T
A
= 25°C.
(1)(2)(3)
Typical Units
Symbol Parameter Conditions Limits
(4)
(Limits)
76 (+42)
GSM Filter set, 200kHz channel BW,
SNR Signal-to-Noise Ratio dBFS
(9)
NCO = 11.1MHz (248.9MHz
SINAD Signal-to-Noise and Distortion @52MSPS aliases to 11.1 MHz), f
S
= 74 dBc
52MSPS, f
IN
= 249MHz at -3dBFS
SFDR Spurious Free Dynamic Range 90 dBc
79 (+42)
GSM Filter set, 200kHz channel BW,
SNR Signal-to-Noise Ratio dBFS
(9)
NCO = 11.1MHz (248.9MHz
SINAD Signal-to-Noise and Distortion @65MSPS aliases to 11.1 MHz), f
S
= 71 dBc
65MSPS, f
IN
= 249MHz at -9dBFS
SFDR Spurious Free Dynamic Range 81 dBc
74 (+42)
GSM Filter set, 200kHz channel BW,
SNR Signal-to-Noise Ratio dBFS
(9)
NCO = 11.1MHz (248.9MHz
SINAD Signal-to-Noise and Distortion @65MSPS aliases to 11.1 MHz), f
S
= 71 dBc
65MSPS, f
IN
= 249MHz at -3dBFS
SFDR Spurious Free Dynamic Range 80 dBc
(9) (+x) indicates the additional dynamic range provided by the AGC. The DVGA in front of the LM97593 provides 42 dB of gain adjustment.
DC and Logic Electrical Characteristics
Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = D18GND = 0V, V
A
= V
D
= V
DR
=
+3.3V, V
D18
= +1.8V, Internal V
REF
= +1.0V, f
CLK
= 65 MHz, V
CM
= V
COM
, t
R
= t
F
= TBD ns, C
L
= 5 pF/pin. CIC Decimation = 48,
F2 Decimation = 2. Typical values are for T
A
= 25°C. Boldface limits apply for T
MIN
≤ T
A
≤ T
MAX
. All other limits apply for T
A
= 25°C.
Typical Units
Symbol Parameter Conditions Limits
(1)
(Limits)
V
IL
Voltage input low 0.7 V (max)
V
IH
Voltage input high 2.3 V (min)
I
OZ
Input current 20 µA
V
OL
Voltage output low (I
OL
= 7mA) 0.4 V (max)
V
OH
Voltage output high (I
OH
= -7mA) 2.4 V (min)
C
IN
Input capacitance 5.0 pF
POWER SUPPLY CHARACTERISTICS
I
A
ADC Analog Supply Current 65MSPS 96 121 mA (max)
I
A
ADC Analog Supply Current 52MSPS 84 mA
I
D
ADC Digital Supply Current 65MSPS 24 28 mA (max)
I
D
ADC Digital Supply Current 52MSPS 20 mA
I
DR
Digital Output Supply Current
(2)
65MSPS 14 18 mA (max)
I
DR
Digital Output Supply Current
(2)
52MSPS 10 mA
I
D18
Digital Core Supply Current 65MSPS 67 78 mA (max)
I
D18
Digital Core Supply Current 52MSPS 53 mA
P
D65
Total Power Dissipation GSM Set, 65MSPS 560 793 mW (max)
P
D52
Total Power Dissipation GSM Set, 52MSPS 485 mW
Rejection of Full-Scale Error with VA =
PSRR Power Supply Rejection Ratio dB
3.0V vs. 3.6V
(1) Typical figures are at T
A
= 25°C and represent most likely parametric norms at the time of product characterization. The typical
specifications are not ensured. Test Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(2) I
DR
is the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins,
the supply voltage, V
DR
, and the rate at which the outputs are switching (which is signal dependent). I
DR
=V
DR
(C
0
x f
0
+ C
1
x f
1
+....C
11
x
f
11
) where V
DR
is the output driver power supply voltage, C
n
is total capacitance on the output pin, and f
n
is the average frequency at
which that pin is toggling.
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM97593