Datasheet

LM97593
www.ti.com SNWS019B –JULY 2007–REVISED APRIL 2013
LM97593 Electrical Characteristics
Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = D18GND = 0V, V
A
= V
D
= V
DR
=
+3.3V, V
D18
= +1.8V, Internal V
REF
= +1.0V, f
CLK
= 65 MHz, V
CM
= V
COM
, t
R
= t
F
= 1 ns, C
L
= 5 pF/pin. The ADC’s 11 most
significant bits observed at the mixer output debug tap with NCO = 0Hz. Typical values are for T
A
= 25°C. Boldface limits
apply for T
MIN
≤ T
A
≤ T
MAX
. All other limits apply for T
A
= 25°C.
(1)(2)(3)
Typical Units
Symbol Parameter Conditions Limits
(4)
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes 11 Bits (min)
2 LSB (max)
INL Integral Non Linearity
(5)
Ramp, End Point ±0.7
-2 LSB (min)
0.85 LSB (max)
DNL Differential Non Linearity Ramp, End Point ±0.3
-0.85 LSB (min)
V
OFF
Offset Error −40°C to +85°C -4.1 LSB
REFERENCE AND ANALOG INPUT CHARACTERISTICS
1.0 V (min)
V
CM
Common Mode Input Voltage 1.5
2.0 V (max)
V
COM
A
Reference Output Voltage 1.5 V
V
COM
B
CK LOW 8 pF
V
IN
Input Capacitance (each pin to GND)
C
IN
(V
IN
= 1.5Vdc ±0.5V)
(6)
CK HIGH 7 pF
0.8 V (min)
V
REF
External Reference Voltage
(7)
1.0
1.2 V (max)
Reference Input Resistance 1 MΩ
(1) The inputs are protected as shown below. Input voltage magnitudes above V
A
or below GND will not damage this device, provided
current is limited per Note (4).
(2) To ensure accuracy, it is required that |V
A
–V
D
| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
(3) With the test condition for V
REF
= +1.0V (2V
P-P
differential input), the 12-Bit LSB is 488 µV.
(4) Typical figures are at T
A
= 25°C and represent most likely parametric norms at the time of product characterization. The typical
specifications are not ensured. Test Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(5) Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through
positive and negative full-scale.
(6) The input capacitance is the sum of the package/pin capacitance and the sample and hold circuit capacitance.
(7) Optimum performance will be obtained by keeping the reference input in the 0.8V to 1.2V range. The LM4051CIM3-ADJ (SOT-23
package) is recommended for external reference applications.
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