Datasheet

0 60
P
OUT
(dB)
-120
-100
-80
-60
-40
0
20
AGC RAM CONTENTS
5040302010
-20
0 30
ADDRESS
-120
-100
-80
-60
-40
0
20
AGC RAM CONTENTS
252015105
-20
LM97593
SNWS019B –JULY 2007–REVISED APRIL 2013 www.ti.com
Figure 83. Example of programmed RAM contents
Figure 84. Example of programmed RAM contents
Table 5. 15-bit Mixer Output Alignment into the 22-bit SHIFT-UP Based On EXP
AGAIN
a
EXP
b
Input
c
21
d
20 19 18 17 16 15 14 ... 8 7 6 5 4 3 2 1 0
000 = -12dB 111 = +0dB -12dB 14 13 12 11 10 9 8 7 ... 1 0 L L L L L L L
001 = -6dB 110 = -6dB -12dB 14 14 13 12 11 10 9 8 ... 2 1 0 L L L L L L
010 = 0dB 101 = -12dB -12dB 14 14 14 13 12 11 10 9 ... 3 2 1 0 L L L L L
011 = +6dB 100 = -18dB -12dB 14 14 14 14 13 12 11 10 ... 4 3 2 1 0 L L L L
100 = +12dB 011 = -24dB -12dB 14 14 14 14 14 13 12 11 ... 5 4 3 2 1 0 L L L
101 = +18dB 010 = -30dB -12dB 14 14 14 14 14 14 13 12 ... 6 5 4 3 2 1 0 L L
110 = +24dB 001 = -36dB -12dB 14 14 14 14 14 14 14 13 ... 7 6 5 4 3 2 1 0 L
111 = +30dB 000 = -42dB -12dB 14 14 14 14 14 14 14 14 ... 8 7 6 5 4 3 2 1 0
These values are shown with respect to the table addresses in Figure 83, and the CIC filter output P
OUT
in
Figure 84. For a 52MHz clock rate and AGC_LOOP_GAIN=2, these values result in a loop time constant of
1.5µs.
The error signal from the loop gain “SHIFT DOWN” circuit is gated into the loop integrator. A MUX within the
integrator feedback allows the integrator to be initialized to the value loaded into AGC_IC_A (channel B can be
set independently). The top eight bits of the integrator output can also be read back over the microprocessor
interface from the AGC_RB_A (or AGC_RB_B) register. The top 3 bits become AGAIN and are output along with
the ASTROBE signal on the DVGA interface pins. The valid range of AGAIN is from 0 to 7 which corresponds to
a valid range of 0 to 2
11
-1 for the 11-bit, 2’s complement integrator output from which AGAIN is derived. This is
illustrated in Figure 85. The integrator saturates at these limits to prevent overshoots as the integrator attempts to
enter the valid range. The AGAIN value is inverted (EXP) and used to adjust the gain of the incoming signal to
provide a linear output dynamic range. The relationship between the DVGA analog gain (AGAIN) and the “FIXED
TO FLOAT CONVERTER” digital gain (EXP) is shown in Table 5. The DVGA’s compression of the incoming
signal in the analog domain vs. the subsequent expansion in the digital domain is shown in Figure 77.
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