Datasheet
LM97593
SNWS019B –JULY 2007–REVISED APRIL 2013
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Register Name Width Type Default
(1)
Addr Bit Description
Phase word for channel A. Format is a 16-bit, unsigned
magnitude number spread across 2 registers. The LSBs are in
PHASE_A 2B R/W 0 11-12 7:0
the lower registers. The NCO phase PHI is PHI=2*pi*PHASE_A/
2
16
.
Frequency word for channel B. Format is a 32-bit, 2’s
complement number spread across 4 registers. The LSBs are in
FREQ_B 4B R/W 0 13-16 7:0
the lower registers. The NCO frequency F is F/F
CK
=FREQ_B/
2
32
.
Phase word for channel B. Format is a 16-bit, unsigned
magnitude number spread across 2 registers. The LSBs are in
PHASE_B 2B R/W 0 17-18 7:0
the lower registers. The NCO phase PHI is PHI=2*pi*PHASE_B/
2
16
.
0=Select AIN as channel input source. 1=Select BIN. 2=3=Select
A_SOURCE 2 R/W 0 19 1:0
TEST_REG as channel input source.
0=Select AIN as channel input source. 1=Select BIN. 2=3=Select
B_SOURCE 2 R/W 1 19 3:2
TEST_REG as channel input source.
0=Allow exponent to pass into FLOAT TO FIXED converter.
EXP_INH 1b R/W 0 20 0 1=Force exponent in DDC channel to a 7 (maximum digital gain).
This affects both channels.
Reserved 1b R/W 1 20 1 AGC_FORCE on the CLC5902. Do not use.
Reserved 1b R/W 0 20 2 AGC_RESET_EN on the CLC5902. Do not use.
0=Normal closed-loop operation. 1=Hold integrator at initial
AGC_HOLD_IC 1b R/W 0 20 3
condition. This affects both channels.
Bit shift value for AGC loop. Valid range is from 0 to 3. This
AGC_LOOP_GAIN 2b R/W 0 20 4:5
affects both channels.
Reserved 2B R/W 0 21-22 7:0 AGC_COUNT on the CLC5902. Do not use.
AGC fixed gain for channel A. Format is an 8-bit, unsigned
AGC_IC_A 1B R/W 0 23 7:0 magnitude number. The channel A DVGA gain will be set to the
inverted three MSBs.
AGC fixed gain for channel B. Format is an 8-bit, unsigned
AGC_IC_B 1B R/W 0 24 7:0 magnitude number. The channel B DVGA gain will be set to the
inverted three MSBs.
AGC integrator readback value for channel A. Format is an 8-bit,
AGC_RB_A 1B R 0 25 7:0 unsigned magnitude number. The user can read the magnitude
MSBs of the channel A integrator from this register.
AGC integrator readback value for channel B. Format is an 8-bit,
AGC_RB_B 1B R 0 26 7:0 unsigned magnitude number. The user can read the magnitude
MSBs of the channel B integrator from this register.
Test input source. Instead of processing values from the
27(LSBs) 7:0 A|BIN pins, the value from this location is used
TEST_REG 14b R/W 0
28(MSBs) 5:0 instead. Format is 14-bit 2s complement number spread across 2
registers.
Reserved 1B - - 29 7:0 For future use.
Reserved 1B - - 30 7:0 For future use
DEBUG_EN 1b R/W 0 31 0 0=Normal. 1=Enables access to the internal probe points.
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