Datasheet

STEP 3.
All channels have the same pulse pattern. Write the following 8-bit pulse pattern to Register 18 and Register 19h.
Channel Register Data
P part Ch 0 - 7 Reg. 18h 1001 0110 b
N part Ch 0 - 7 Reg. 19h 0110 1001 b
STEP 4.
When the writing operation is complete and the TX path is ready, pull “TX_EN“ high. After 6 ICLK (160MHz) clock cycles (37.5ns)
have passed, each channel will start to count its programmed delay profile. When it reaches the preset value, it will trigger the firing
sequence.
As illustrated in the firing diagram in Figure 18, the firing begins with a non-inverted preloaded pulse pattern. After “TX_EN” is
pulled low, the receiver will perform its operation. When “TX_EN” is pulled high again for the next firing, the inverted preloaded
pulse pattern will be transmitted. This process will be iterated only if the beamformer is in invert firing mode.
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FIGURE 18. Beamformer Output in Inverting Mode
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LM96570