Datasheet
LM96163
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SNAS433D –JUNE 2008–REVISED MAY 2013
PCB LAYOUT FOR MINIMIZING NOISE
Figure 16. Ideal Diode Trace Layout
In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced
on traces running between the remote temperature diode sensor and the LM96163 can cause temperature
conversion errors. Keep in mind that the signal level the LM96163 is trying to measure is in microvolts. The
following guidelines should be followed:
1. Use a low-noise +3.3VDC power supply, and bypass to GND with a 0.1 µF ceramic capacitor in parallel with
a 100 pF ceramic capacitor. The 100 pF capacitor should be placed as close as possible to the power supply
pin. A bulk capacitance of 10 µF needs to be in the vicinity of the LM96163's V
DD
pin.
2. A 100 pF diode bypass capacitor is recommended to filter high frequency noise but may not be necessary.
Place the recommended 100 pF diode capacitor as close as possible to the LM96163's D+ and D− pins.
Make sure the traces to the 100 pF capacitor are matched. The LM96163 can handle capacitance up to 3 nF
placed between the D+ and D- pins, see Typical Performance Characteristics curves titled Remote
Temperature Reading Sensitivity to Thermal Diode Filter Capacitance.
3. Ideally, the LM96163 should be placed within 10 cm of the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resistance of 1 Ω can cause as much as 0.62°C of error. This
error can be compensated by using the Remote Temperature Offset Registers, since the value placed in
these registers will automatically be subtracted from or added to the remote temperature reading.
4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This
GND guard should not be between the D+ and D− lines. In the event that noise does couple to the diode
lines it would be ideal if it is coupled common mode. That is equally to the D+ and D− lines.
5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.
6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be
kept at least 2 cm apart from the high speed digital traces.
7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should
cross at a 90 degree angle.
8. The ideal place to connect the LM96163's GND pin is as close as possible to the Processor's GND
associated with the sense diode.
9. Leakage current between D+ and GND should be kept to a minimum. Thirteen nano-amperes of leakage can
cause as much as 0.2°C of error in the diode temperature reading. Keeping the printed circuit board as clean
as possible will minimize leakage current.
Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV
below GND, may prevent successful SMBus communication with the LM96163. SMBus no acknowledge is the
most common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of
communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a
system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB
corner frequency of about 40 MHz is included on the LM96163's SMBCLK input. Additional resistance can be
added in series with the SMBDAT and SMBCLK lines to further help filter noise and ringing. Minimize noise
coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines
containing high speed data communications cross at right angles to the SMBDAT and SMBCLK lines.
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