Datasheet

LM96163
www.ti.com
SNAS433D JUNE 2008REVISED MAY 2013
ALERT Status and Mask Registers
Address Read/ POR
Bits Name Description
Hex Write Value
02
HEX
ALERT STATUS REGISTER (8-bits) (All Alarms are latched until read, then cleared if alarm condition was removed at the
time of the read.)
Busy
7 0 BUSY 0: the ADC is not converting.
1: the ADC is performing a conversion. This bit does not affect ALERT status.
Local High Alarm
0: the internal temperature of the LM96163 is at or below the Local High Setpoint.
6 0 LHIGH
1: the internal temperature of the LM96163 is above the Local High Setpoint, and
an ALERT is triggered.
5 0 [Reserved] This bit is unused and always read as 0.
Remote High Alarm
0: the temperature of the Remote Diode is at or below the Remote High Setpoint.
4 0 RHIGH
1: the temperature of the Remote Diode is above the Remote High Setpoint, and
an ALERT is triggered.
Remote Low Alarm
0: the temperature of the Remote Diode is at or above the Remote Low Setpoint.
3 0 RLOW
1: the temperature of the Remote Diode is below the Remote Low Setpoint, and
an ALERT is triggered.
0x02 R
Remote Diode Fault Alarm
0: the Remote Diode appears to be correctly connected.
2 0 RDFA
1: the Remote Diode may be disconnected or shorted to ground. This Alarm does
not trigger an ALERT or a TCRIT.
Remote T_CRIT Alarm
When this bit is a 0, the temperature of the Remote Diode is at or below the
1 0 RCRIT T_CRIT Limit.
When this bit is a 1, the temperature of the Remote Diode is above the T_CRIT
Limit, ALERT and TCRIT are triggered.
Tach Alarm
When this bit is a 0, the Tachometer count is lower than or equal to the
Tachometer Limit (the RPM of the fan is greater than or equal to the minimum
0 0 TACH desired RPM).
When this bit is a 1, the Tachometer count is higher than the Tachometer Limit
(the RPM of the fan is less than the minimum desired RPM), and an ALERT is
triggered.
16
HEX
ALERT MASK REGISTER (8-bits)
R 7 1 [Reserved] This bit is unused and always read as 1.
Local High Alarm Mask
R/W 6 0 LHAM 0: a Local High Alarm event will generate an ALERT.
1: a Local High Alarm will not generate an ALERT
R 5 1 [Reserved] This bit is unused and always read as 1.
Remote High Alarm Mask
4 0 RHAM 0: Remote High Alarm event will generate an ALERT.
1: a Remote High Alarm event will not generate an ALERT.
R/W
Remote Low Alarm Mask
16
3 0 RLAM 0: a Remote Low Alarm event will generate an ALERT.
1: a Remote Low Alarm event will not generate an ALERT.
R 2 1 [Reserved] This bit is unused and always read as 1.
Remote T_CRIT Alarm Mask
1 0 RTAM 0: a Remote T_CRIT event will generate an ALERT.
1: a Remote T_CRIT event will not generate an ALERT.
R/W
TACH Alarm Mask
0 0 TCHAM When this bit is a 0, a Tach Alarm event will generate an ALERT.
When this bit is a 1, a Tach Alarm event will not generate an ALERT.
33
HEX
POWER ON RESET STATUS REGISTER
Power On Reset Status
7 NR 0: Power On Reset cycle over part ready
33 R
1: Power On Reset cycle in progress part not ready
6:0 [Reserved] These bits are unused and will always report 0.
Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback 33
Product Folder Links: LM96163