Datasheet
LM96163
www.ti.com
SNAS433D –JUNE 2008–REVISED MAY 2013
Address Read/ POR
Bits Name Description
Hex Write Value
4A
HEX
FAN PWM AND TACHOMETER CONFIGURATION REGISTER
R 7:6 00 [Reserved] These bits are unused and always read as 0.
PWM Programming enable
0: the PWM Value (register 0x4C), the PWM Smoothing (0x45[2:0]) and the
Lookup Table (Registers 0x50–0x67) are read-only. The PWM value (0 to 100%) is
determined by the current remote diode temperature and the Lookup Table, and
5 1 PWPGM can be read from the PWM value register.
1: the PWM value (register 0x4C), the PWM Smoothing (0x45[2:0]) and the Lookup
Table (Registers 0x50–0x67) are read/write enabled. Writing the PWM Value
register will set the PWM output. This is also the state during which the Lookup
Table can be written.
PWM Output Polarity
4 0 PWOP 0: the PWM output pin will be 0V for fan OFF and open for fan ON.
1: the PWM output pin will be open for fan OFF and 0V for fan ON.
PWM Master Clock Select
3 0 PWCLSL 0: the master PWM clock is 360 kHz
1: the master PWM clock is 1.4 kHz.
4A
2 0 [Reserved] Always write 0 to this bit.
R/W
Tachometer Mode
00: Traditional tach input monitor, false readings when under minimum detectable
RPM. (Smart-TACH mode disabled)
01: Traditional tach input monitor, FFFFh reading when under minimum detectable
RPM. Smart-TACH mode enabled, PWM duty cycle not affected. Use with direct
PWM drive of fan power. TACH readings can cause an error event if TACH
setpoint register is set to less than FFFFh even though fan may be spinning
properly.
1:0 00 TACH1:TACH0
10: Most accurate readings, FFFFh reading when under minimum detectable RPM.
Smart-TACH mode enabled, PWM duty cycle modified. Use with direct PWM drive
of fan power. This mode extends the TACH monitoring low RPM sensitivity.
11: Least effort on programmed PWM of fan, FFFF reading when under minimum
detectable RPM. Smart-TACH mode enabled. Use with direct PWM drive of fan
power. This mode extends the TACH monitoring low RPM sensitivity the most.
Note: If the PWM Master Clock is 360 kHz, mode 00 is used regardless of the
setting of these two bits.
4B
HEX
FAN SPIN-UP CONFIGURATION REGISTER
R 7:6 0 [Reserved] These bits are unused and always read as 0
Fast Tachometer Spin-up
If 0, the fan spin-up uses the duty cycle and spin-up time, bits 0–4.
If 1, the LM96163 sets the PWM output to 100% until the spin-up times out (per
bits 0–2) or the minimum desired RPM has been reached (per the Tachometer
5 1 SPINUP Setpoint setting) using the tachometer input, whichever happens first. This bit
overrides the PWM Spin-Up Duty Cycle register (bits 4:3)—PWM output is always
100%. Register x03, bit 2 = 1 for Tachometer mode.
If PWM Spin-Up Time (bits 2:0) = 000, the Spin-Up cycle is bypassed, regardless
of the state of this bit.
PWM Spin-Up Duty Cycle
00: Spin-Up cycle bypassed (no Spin-Up), unless Fast Tachometer Terminated
4B
SPNDTY1:SPNDT Spin-Up (bit 5) is set.
R/W 4:3 11
Y0 01: 50%
10: 75%–81% Depends on PWM Frequency. See Applications Notes.
11: 100%
PWM Spin-Up Time Interval
000: Spin-Up cycle bypassed (No Spin-Up)
001: 0.05 seconds
010: 0.1 s
SPNTIM2:SPNTIM
2:0 111 011: 0.2 s
0
100: 0.4 s
101: 0.8 s
110: 1.6 s
111: 3.2 s
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