Datasheet

LM96163
SNAS433D –JUNE 2008–REVISED MAY 2013 www.ti.com
2. With both SMBDAT and SMBCLK High, the master can initiate an SMBus start condition with a High to Low
transition on the SMBDAT line. The LM96163 will respond properly to an SMBus start condition at any point
during the communication. After the start the LM96163 will expect an SMBus Address address byte.
LM96163 REGISTERS
The following pages include: LM96163 REGISTER MAP IN HEXADECIMAL ORDER, which shows a summary of
all registers and their bit assignments, LM96163 REGISTER MAP IN FUNCTIONAL ORDER, and LM96163
DETAILED REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER, a detailed explanation of each register. Do
not address the unused or manufacturer’s test registers.
LM96163 REGISTER MAP IN HEXADECIMAL ORDER
The following is a Register Map grouped in hexadecimal address order. Some address locations have been left
blank to maintain compatibility with LM86, LM63 and LM64. Addresses in parenthesis are mirrors of “Same As”
address for backwards compatibility with some older software. Reading or writing either address will access the
same 8-bit register.
DATA BITS
Register R/ POR
Register Name
0x[HEX] W Val
D7 D6 D5 D4 D3 D2 D1 D0
00 R – Local Temperature LT7 LT6 LT5 LT4 LT3 LT2 LT1 LT0
(Signed MSB) SIGN 64 32 16 8 4 2 1
01 R – Rmt Temp MSB RT12 RT11 RT10 RT9 RT8 RT7 RT6 RT5
SIGN 64 32 16 8 4 2 1
02 R – ALERT Status BUSY LHIGH 0 RHIGH RLOW RDFA RCRIT TACH
03 R/ 00 Configuration ALTMSK STBY PWMDIS 0 0 TCHEN TCRITOV FLTQUE
W
04 R/ 08 Conversion Rate 0 0 0 0 CONV3 CONV2 CONV1 CONV0
W
05 R/ 46 Local High Setpoint LHS7 LHS6 LHS5 LHS4 LHS3 LHS2 LHS1 LHS0
W SIGN 64 32 16 8 4 2 1
06 [Reserved] Not Used
07 R/ 55 Rmt High Setpoint RHS10 RHS9 RHS8 RHS7 RHS6 RHS5 RHS4 RHS3
W MSB SIGN 64 32 16 8 4 2 1
/128
08 R/ 00 Rmt Low Setpoint RLS10 RLS9 RLS8 RLS7 RLS6 RLS5 RLS4 RLS3
W MSB SIGN 64 32 16 8 4 2 1
(09) R/ 00 Same as 03 ALTMSK STBY PWMDIS 0 0 TCHEN TCRITOV FLTQUE
W
(0A) R/ 08 Same as 04 0 0 0 0 CONV3 CONV2 CONV1 CONV0
W
(0B) R/ 46 Same as 05 LHS7 LHS6 LHS5 LHS4 LHS3 LHS2 LHS1 LHS0
W SIGN 64 32 16 8 4 2 1
0C R 00 [Reserved] Not Used
(0D) R/ 55 Same as 07 RHS10 RHS9 RHS8 RHS7 RHS6 RHS5 RHS4 RHS3
W SIGN 64 32 16 8 4 2 1
/128
(0E) R/ 00 Same as 08 RLS10 RLS9 RLS8 RLS7 RLS6 RLS5 RLS4 RLS3
W SIGN 64 32 16 8 4 2 1
0F W – One Shot Write Only. Write command triggers one temperature conversion cycle.
10 R – Rmt Temp LSB RT4 RT3 RT2 RT1 RT0 0 0 0
(Dig Filter On or Reg ½ ¼ ⅛ 1/16 1/32
45h STFBE bit set)
Rmt Temp LSB 0 0
(Dig Filter Off)
11 R/ 00 Rmt Temp Offset RTO10 RTO9 RTO8 RTO7 RTO7 RTO5 RTO4 RTO3
W MSB SIGN 64 32 16 8 4 2 1
12 R/ 00 Rmt Temp Offset RTO2 RTO1 RTO0 0 0 0 0 0
W LSB ½ ¼ ⅛
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