Datasheet

LM96080
SNAS465D –SEPTEMBER 2009–REVISED MARCH 2013 www.ti.com
PIN DESCRIPTIONS (continued)
Pin Pin ESD
Type Description
Number Name(s) Structure
An active-low input that enables NAND Tree board-level
NTEST_IN/
12 Digital Input connectivity testing. Whenever NAND Tree connectivity is
RESET_IN
enabled, the LM96080 resets to its power on state.
This pin is an NMOS open drain output. RST_OUT
RST_OUT/O
13 Digital Output provides a master reset to devices connected to this line.
S
OS is dedicated to the temperature reading WATCHDOG.
Internally connected to all analog circuitry. The ground
reference for all analog inputs. This pin needs to be taken
14 GNDA GROUND
to a low noise analog ground plane for optimum
performance.
15-21 IN6-IN0 Analog Inputs 0V to 2.56V full scale range Analog Inputs.
A0/NTEST_O The lowest order bit of the Serial Bus Address. This pin
22 Digital I/O
UT also functions as an output when doing a NAND Tree test.
23-24 A1-A2 Digital Inputs The two highest order bits of the Serial Bus Address.
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