Datasheet

SMBDAT
SMBCLK
Address
Enable
Address
Select
START 0 1 0 1 1
first 5 address bits
Latch state of AE if
first 5 address bits
are correct for
SMBus address 2Eh
selection.
SMBDAT
SMBCLK
Address
Enable
Address
Select
START 0 1 0 1 1
first 5 address bits
Latch state of AE and AS
if first 5 address bits are
correct for SMBus
address 2Ch and 2Dh
selection.
LM96000
www.ti.com SNAS234C –APRIL 2004–REVISED MARCH 2013
PWM3/Address Enable pin is not used to change the SMBus address of the LM96000, it will remain in a high
state until the first communication with the LM96000. After the first SMBus transaction is completed PWM3
and TACH4 will return to normal operation.
Address Enable Address Select Board Implementation SMBus Address
0 0 Pulled to ground through a 10 kΩ 010 1100b, 2Ch
resistor
0 1 Pulled to 3.3V or to GND through 010 1101b, 2Dh
a 10 kΩ resistor
1 X Pulled to 3.3V through a 10 kΩ 010 1110b, 2Eh
resistor
In this way, up to three LM96000 devices can exists on an SMBus at any time. Multiple LM96000 devices can be
used to monitor additional processors and temperature zones. When using the non-default addresses the TACH4
and PWM3 will not function. As shown in the timing diagram the Address Enable pin must remain low in order for
the latched address to remain in effect. If the address enable pin is pulled high after the first SMBus
communication, then the LM96000 SMBus address will revert to the default value (2Eh) after the first five clocks
of next SMBus communication.
Figure 7. Address Latch Enable low during and after first communication
Figure 8. Address Latch Enable high during first communication
2.0 FAN REGISTER DEVICE SET-UP
The BIOS will follow the following steps to configure the fan registers on the LM96000. The registers
corresponding to each function are listed. All steps may not be necessary if default values are acceptable.
Regardless of all changes made by the BIOS to the fan limit and parameter registers during configuration, the
LM96000 will continue to operate based on default values until the START bit (bit 0), in the
Ready/Lock/Start/Override register (address 40h), is set. Once the fan mode is updated, by setting the START
bit to 1, the LM96000 will operate using the values that were set by the BIOS in the fan control limit and
parameter registers (adress 5Ch through 6Eh).
1. Set limits and parameters (not necessarily in this order):
– – [5F-61h] Set PWM frequencies and auto fan control range.
– – [62-63h] Set spike smoothing and min/off.
– – [5C-5Eh] Set the fan spin-up delays.
– – [5C-5Eh] Match each fan with a corresponding thermal zone.
Copyright © 2004–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM96000