Datasheet
SNP
V+
GND
D1
R1
ESD
Clamp
D3
PIN
D2
6.5V
R2
GND
PIN
D1
V+
6.5V
D3
ESD
CLAMP
50:
D2
SNP
GND
D1
PIN
D2
V+
6.5V
D4
ESD
CLAMP
50:
D3
V+
GND
ESD
Clamp
6.5V
D1
D2
D3
160 k
80 k
LM96000
SNAS234C –APRIL 2004–REVISED MARCH 2013
www.ti.com
Pin Pin Name Circuit All Input Circuits
No.
5 VID0 A
6 VID1
7 VID2
8 VID3
9 TACH3
Figure 3. Circuit B
10 PWM2
11 TACH1
12 TACH2
13 PWM3/AddEnable
14 TACH4/AddSel
Figure 4. Circuit C
15 REMOTE2− C
16 REMOTE2+ D
17 REMOTE1− C
18 REMOTE1+ D
19 VID4 A
Figure 5. Circuit D
20 5V E
21 12V
22 2.5V
23 VCCP_IN
24 PWM1/xTEXTOUT A
Figure 6. Circuit E
FUNCTIONAL DESCRIPTION
1.0 SMBUS
The LM96000 is compatible with devices that are compliant to the SMBus 2.0 specification. More information on
this bus can be found at: http://www.smbus.org/. Compatibility of SMBus2.0 to other buses is discussed in the
SMBus 2.0 specification.
1.1 Addressing
LM96000 is designed to be used primarily in desktop systems that require only one monitoring device.
If only one LM96000 is used on the motherboard, the designer should be sure that the PWM3/Address Enable
pin is High during the first SMBus communication addressing the LM96000. PWM3/Address Enable is an open
drain I/O pin that at power-on defaults to the input state of Address Enable. A maximum of 10k pull-up resistance
on PWM3/Address Enable is required to assure that the SMBus address of the device will be locked at 010
1110b, which is the default address of the LM96000.
During the first SMBus communication TACH4 and PWM3 can be used to change the SMBus address of the
LM96000 to 0101101b or 0101100b. LM96000 address selection procedure:
• A 10 kΩ pull-down resistor to ground on the PWM3/Address Enable pin is required. Upon power up, the
LM96000 will be placed into Address Enable mode and assign itself an SMBus address according to the state
of the Address Select input. The LM96000 will latch the address during the first valid SMBus transaction in
which the first five bits of the targeted address match those of the LM96000 address, 0 1011b. This feature
eliminates the possibility of a glitch on the SMBus interfering with address selection. When the
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