Datasheet

LM96000
SNAS234C –APRIL 2004–REVISED MARCH 2013 www.ti.com
Table 7. Spike Smoothing
ZN-X[2:0] Spike Smoothed Over
000 35 seconds
001 17.6 seconds
010 11.8 seconds
011 7.0 seconds
100 4.4 seconds
101 3.0 seconds
110 1.6 seconds
111 .8 seconds
Table 8. PWM Output Below Limit Depending on Value of Off/Min
Off/Min PWM Action
0 At 0% duty below LIMIT
1 At Min PWM Duty below LIMIT
4.17 Registers 64-66h: Minimum PWM Duty Cycle
Register Read/ Register Bit 7 Bit 0 Default
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Lock?
Address Write Name (MSB) (LSB) Value
64h R/W Fan1 7 6 5 4 3 2 1 0 80h ✓
PWM
Minimum
65h R/W Fan2 7 6 5 4 3 2 1 0 80h ✓
PWM
Minimum
66h R/W Fan3 7 6 5 4 3 2 1 0 80h ✓
PWM
Minimum
These registers specify the minimum duty cycle that the PWM will output when the measured temperature
reaches the Temperature LIMIT register setting.
This register becomes Read Only when the Ready/Lock/Start/Override register Lock bit is set. Any further
attempts to write to this register shall have no effect. After power up the default value is used whenever the
Ready/Lock/Start/Override register Start bit is cleared even though modifications to this register are possible.
Table 9. PWM Duty vs Register Setting for PWM Low Frequency Range
Current Duty Value (Decimal) Value (Hex)
0% 0 00h
0.3922% 1 01h
. . .
. . .
. . .
25.098% 64 40h
. . .
. . .
. . .
50.196% 128 80h
. . .
. . .
. . .
100% 255 FF
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