Datasheet

LM96000
www.ti.com SNAS234C –APRIL 2004–REVISED MARCH 2013
Table 3. Temperature Limits vs Register Settings (continued)
Temperature Reading (Decimal) Reading (Hex)
. . .
. . .
. . .
50°C 50 32h
. . .
. . .
. . .
127°C 127 7Fh
4.13 Registers 54-5Bh: Fan Tachometer Low Limit
Register Read/ Register Bit 7 Bit 0 Default
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Address Write Name (MSB) (LSB) Value
54h R/W Tach1 7 6 5 4 3 2 1 0 FFh
55h R/W Minimum 15 14 13 12 11 10 9 8 FFh
LSB
Tach1
Minimum
MSB
56h R/W Tach2 7 6 5 4 3 2 1 0 FFh
57h R/W Minimum 15 14 13 12 11 10 9 8 FFh
LSB
Tach2
Minimum
MSB
58h R/W Tach3 7 6 5 4 3 2 1 0 FFh
59h R/W Minimum 15 14 13 12 11 10 9 8 FFh
LSB
Tach3
Minimum
MSB
5Ah R/W Tach4 7 6 5 4 3 2 1 0 FFh
5Bh R/W Minimum 15 14 13 12 11 10 9 8 FFh
LSB
Tach4
Minimum
MSB
The Fan Tachometer Low Limit registers indicate the tachometer reading under which the corresponding bit will
be set in the Interrupt Status Register 2 register. In Auto Fan Control mode, the fan can run at low speeds, so
care should be taken in software to ensure that the limit is high enough not to cause sporadic alerts. The fan
tachometer will not cause a bit to be set in Interrupt Status Register 2 if the current value in Current PWM Duty
registers is 00h or if the fan 1 disabled via the Fan Configuration Register. Interrupts will never be generated for
a fan if its minimum is set to FF FFh.
Given the insignificance of Bit 0 and Bit 1, these bits could be programmed to remember which fan is which, as
follows.
Fan Bit 1 Bit 0
CPU 0 0
Memory 0 1
Chassis Front 1 0
Chassis Rear 1 1
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