Datasheet

LM95245
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SNIS148G OCTOBER 2007REVISED MARCH 2013
3. Write/Read same address
4. Write/Read different address
A Write to the LM95245 will always include the address byte and the command byte. A write to any register
requires one data byte.
Reading the LM95245 can take place either of two ways:
1. If the location latched in the Command Register is correct (most of the time it is expected that the Command
Register will point to one of the Read Temperature Registers because that will be the data most frequently
read from the LM95245), then the read can simply consist of an address byte, followed by retrieving the data
byte.
2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another
address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, the LM95245 can accept either acknowledge
or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master
has read its last byte). When retrieving all 11 bits from a previous remote diode temperature measurement, the
master must insure that all 11 bits are from the same temperature conversion. This may be achieved by reading
the MSB register first. The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If
the user reads MSBs consecutively, each time the MSB is read, the LSB associated with that temperature will be
locked in and override the previous LSB value locked-in.
SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the LM95245 is transmitting on the SMBDAT line, the
LM95245 must be returned to a known state in the communication protocol. This may be done in one of two
ways:
1. When SMBDAT is LOW, the LM95245 SMBus state machine resets to the SMBus idle state if either
SMBDAT or SMBCLK are held low for more than 35 ms (t
TIMEOUT
). Note that according to SMBus
specification 2.0 all devices are to timeout when either the SMBCLK or SMBDAT lines are held low for 25 -
35 ms. Therefore, to insure a timeout of all devices on the bus the SMBCLK or SMBDAT lines must be held
low for at least 35 ms.
2. When SMBDAT is HIGH, have the master initiate an SMBus start. The LM95245 will respond properly to an
SMBus start condition at any point during the communication. After the start the LM95245 will expect an
SMBus Address address byte.
ONE-SHOT CONVERSION
The One-Shot register is used to initiate a single conversion and comparison cycle when the device is in standby
mode, after which the device returns to standby. This is not a data register and it is the write operation that
causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will
always be read from this register.
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