Datasheet

SNP
GND
D1
PIN
GND
PIN
D1
V+
6.5V
D3
ESD
CLAMP
D2
V+
GND
ESD
Clamp
6.5V
D1
D2
D3
160 k
80 k
V
IH
V
IL
SMBCLK
P
S
V
IH
V
IL
SMBDAT
t
BUF
t
HD;STA
t
LOW
t
R
t
HD;DAT
t
HIGH
t
F
t
SU;DAT
t
SU;STA
t
SU;STO
PS
LM95241
www.ti.com SNIS143E –AUGUST 2006–REVISED MARCH 2013
Logic Electrical Characteristics SMBus Digital Switching Characteristics (continued)
Unless otherwise noted, these specifications apply for V
DD
=+3.0 Vdc to +3.6 Vdc, C
L
(load capacitance) on output lines = 80
pF. Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= +25°C, unless otherwise noted.
The switching characteristics of the LM95241 fully meet or exceed the published specifications of the SMBus version 2.0. The
following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95241. They
adhere to but are not necessarily the SMBus bus specifications.
Symbol Parameter Conditions Typical
(1)
Limits
(2)
Units
(Limit)
t
BUF
SMBus Free Time Between Stop and Start 1.3 µs (min)
Conditions
Figure 2. SMBus Communication
Table 1. Parasitic components and ESD protection circuitry
Pin Label Circ All Input ESD Protection Structure Circuits
# uit
1 D1+ A
2 D1− A
3 D2+ A
4 D2− A
5 GND B
6 V
DD
B
7 SMBDAT C
8 SMBCLK C
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