Datasheet

LM95235
LM95235-Q1
SNIS142F –APRIL 2006–REVISED MARCH 2013 www.ti.com
Table 17. Unsigned Remote Temperature LSB, Filter Off
(Read Only Address 32h)
13-bit unsigned binary formats with filter off:
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0.5 0.25 0.125 0 0 0 0 0
Temperature Data: LSb = 0.125°C filter off or 0.03125°C filter on.
For data synchronization purposes, the MSB register should be read first if the user wants to read both MSB and LSB registers. The LSB
will be locked after the MSB is read. The LSB will be unlocked after being read. If the user reads MSBs consecutively, each time the MSB
is read, the LSB associated with that temperature will be locked in and override the previous LSB value locked-in.
DIODE CONFIGURATION REGISTERS
Table 18. Configuration Register 2
(Read/write Address BFh)
D7 D6 D5 D4 D3 D2 D1 D0
0 OS/A0 Function Select OS Fault Mask T_CRIT Mask TruTherm Select RFE1 RFE0 1
Bits Name Description
7 Reserved Reports "0" when read.
0: Address (A0) function is enabled
6 OS/A0 Function Select
1: Over-temperature Shutdown (OS) is enabled
0: Off
5 Diode Fault Mask for OS
1: On
0: Off
4 Diode Fault Mask for T_CRIT
1: On
0: Selects Diode Model 2, MMBT3904, with TruTherm technology disabled.
Remote Diode TruTherm
3 1: Selects Diode Model 1, A typical Intel Processor, with 65 nm or 90 nm
Mode Select
technology, and TruTherm technology enabled.
00: Filter Disable
01: Reserved
2-1 Remote Filter Enable
10: Reserved
11: Filter Enable
0 Reserved Reports "1" when read.
Power up default is 1Fh.
Table 19. Remote Offset High Byte (2's Complement)
(R/W Address 11h)
10-bit plus sign format:
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value SIGN 64 32 16 8 4 2 1
Power up default is 00h.
Table 20. Remote Offset Low Byte (2's Complement)
10-bit plus sign format:(R/W Address 12h)
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0.50 0.25 0.125 0 0 0 0 0
Power up default is 00h. LSb = 0.125°C.
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