Datasheet
LM95234
www.ti.com
SNIS136D –AUGUST 2006–REVISED MARCH 2013
Bit(s) Bit Name Read/ Description
Write
2 R2TD RO Remote 2 TruTherm BJT beta compensation on and 3904 detect:
1 – indicates that for channel 2 TruTherm is ON and 3904 connected
0 – indicates proper operation
1 R1TD RO Remote 1 TruTherm BJT beta compensation on and 3904 detect:
1 – indicates that for channel 4 TruTherm is ON and 3904 connected
0 – indicates proper operation
0 – RO Reserved – will report "0" when read.
MASK REGISTERS
TCRIT1 Mask Register
The mask bits in this register allow control over which error events propagate to the TCRIT1 pin.
Register Name Command Read/ D7 D6 D5 D4 D3 D2 D1 D0 POR
Byte Write Default
(Hex) (Hex)
TCRIT1 Mask 0x0C R/W – – – R4TM R3TM R2T1 R1T1 LTM 0x19
M M
Bit(s) Bit Name Read/ Description
Write
7-5 – RO Reserved – will report "0" when read.
4 R4TM R/W Remote 4 Tcrit Mask:
1 – prevents the remote 4 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 4 temperature error event to propagate to the TCRIT1 pin
3 R3TM R/W Remote 3 Tcrit Mask:
1 – prevents the remote 3 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 3 temperature error event to propagate to the TCRIT1 pin
2 R2T1M R/W Remote 2 Tcrit-1 Mask:
1 – prevents the remote 2 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 2 temperature error event to propagate to the TCRIT1 pin
1 R1T1M R/W Remote 1 Tcrit-1 Mask:
1 – prevents the remote 1 temperature error event from propagating to the TCRIT1 pin
0 – allows the remote 1 temperature error event to propagate to the TCRIT1 pin
0 LTM R/W Local Tcrit Mask:
1 – prevents the local temperature error event from propagating to the TCRIT1 pin
0 – allows the local temperature error event to propagate to the TCRIT1 pin
TCRIT2 Mask Registers
Register Name Command Read/ D7 D6 D5 D4 D3 D2 D1 D0 POR
Byte Write Default
(Hex) (Hex)
TCRIT2 Mask 0x0D R/W – – – R4TM R3TM R2T2 R1T2 LTM 0x00
M M
Bit(s) Bit Name Read/ Description
Write
7-5 – RO Reserved – will report "0" when read.
4 R4TM R/W Remote 4 Tcrit Mask:
1 – prevents the remote 4 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 4 temperature error event to propagate to the TCRIT2 pin
3 R3TM R/W Remote 3 Tcrit Mask:
1 – prevents the remote 3 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 3 temperature error event to propagate to the TCRIT2 pin
2 R2T2M R/W Remote 2 Tcrit-2 Mask:
1 – prevents the remote 2 temperature error event from propagating to the TCRIT2 pin
0 – allows the remote 2 temperature error event to propagate to the TCRIT2 pin
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