Datasheet

LM95234
www.ti.com SNIS136D –AUGUST 2006–REVISED MARCH 2013
Filter Setting
Register Name Command Read/ D7 D6 D5 D4 D3 D2 D1 D0 POR
Byte Write Default
(Hex) (Hex)
Filter Setting 0x06 R/W – – – – R2F1 R2F0 R1F1 R1F0 0x0F
Bit(s) Bit Name Read/ Description
Write
7–4 – RO Reserved – will report "0" when read.
3–2 R2F[1:0] R/W Remote Channel 2 Filter Enable Bits
R2F[1:0] TEMPERATURE CONVERSION
SEQUENCE State
00 disable all digital filtering
01 enable basic filter
10 reserved (do not use)
11 enable enhanced filter
1–0 R1F[1:0] R/W Remote Channel 1 Filter Enable
R1F[1:0] Filter State
00 disable all digital filtering
01 enable basic filter
10 reserved (do not use)
11 enable enhanced filter
1-Shot
Register Name Command Read/ D7 D6 D5 D4 D3 D2 D1 D0 POR
Byte Write Default
(Hex) (Hex)
1-Shot 0x0F WO – – – – – – – – –
Bit(s) Bit Name Read/ Description
Write
7–0 - WO Writing to this register activates one conversion for all the enabled channels if
the chip is in standby mode (i.e. standby bit = 1). The actual data written does
not matter and is not stored.
STATUS REGISTERS
Common Status Register
Register Name Command Read/ D7 D6 D5 D4 D3 D2 D1 D0 POR
Byte Write Default
(Hex) (Hex)
Common Status Register 0x02 RO BUSY NR – – SR4F SR3F SR2F SR1F 0x00
Bit(s) Bit Name Read/ Description
Write
7 BUSY RO Busy bit (device converting)
6 NR RO Not Ready bit (30 ms), indicates power up initialization sequence is in progress
5–4 – RO Reserved – will report "0" when read.
3 SR4F RO Status Register 4 Flag:
1 – indicates that Status Register 4 has at least one bit set
0 – indicates that all of Status Register 4 bits are cleared
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Links: LM95234