Datasheet

T
CF
=
(80 + 273) = -1.75
o
C
˜
1.003 - 1.008
1.003
¹
·
©
§
T
CF
=
(T
CR
+ 273K)
x
K
S
- K
PROCESSOR
K
S
¹
·
©
§
LM95233
SNIS145E –AUGUST 2006–REVISED MARCH 2013 www.ti.com
where
• η
S
= LM95233 non-ideality for accuracy specification
• η
PROCESSOR
= Processor thermal diode typical non-ideality
• T
CR
= center of the temperature range of interest in °C (11)
The correction factor should be directly added to the temperature reading produced by the LM95233. For
example when using the LM95233, with the 3904 mode selected, to measure a AMD Athlon processor, with a
typical non-ideality of 1.008, for a temperature range of 60 °C to 100 °C the correction factor would calculate to:
(12)
Therefore, 1.75°C should be subtracted from the temperature readings of the LM95233 to compensate for the
differing typical non-ideality target.
PCB LAYOUT FOR MINIMIZING NOISE
Figure 21. Ideal Diode Trace Layout
In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced
on traces running between the remote temperature diode sensor and the LM95233 can cause temperature
conversion errors. Keep in mind that the signal level the LM95233 is trying to measure is in microvolts. The
following guidelines should be followed:
1. V
DD
should be bypassed with a 0.1 µF capacitor in parallel with 100 pF. The 100 pF capacitor should be
placed as close as possible to the power supply pin. A bulk capacitance of approximately 10 µF needs to be
in the near vicinity of the LM95233.
2. A 100 pF diode bypass capacitor is recommended to filter high frequency noise but may not be necessary.
Make sure the traces to the 100 pF capacitor are matched. Place the filter capacitors close to the LM95233
pins.
3. Ideally, the LM95233 should be placed within 10 cm of the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resistance of 1Ω can cause as much as 0.62°C of error. This
error can be compensated by using simple software offset compensation.
4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This
GND guard should not be between the D+ and D− lines. In the event that noise does couple to the diode
lines it would be ideal if it is coupled common mode. That is equally to the D+ and D− lines.
5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.
6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be
kept at least 2 cm apart from the high speed digital traces.
7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should
cross at a 90 degree angle.
8. The ideal place to connect the LM95233's GND pin is as close as possible to the Processors GND
associated with the sense diode.
9. Leakage current between D+ and GND and between D+ and D− should be kept to a minimum. Thirteen
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