Datasheet

LM9076
www.ti.com SNVS260L –NOVEMEBER 2003–REVISED MARCH 2013
When the SHUTDOWN pin is low, or left open, the regulator is switched On. When an unregulated supply, such
as V BATTERY , is used to pull the SHUTDOWN pin high a series resistor in the range of 10KΩ to 50KΩ is
recommended to provide reverse voltage transient protection of the SHUTDOWN pin. Adding a small capacitor
(0.001uF typical) from the SHUTDOWN pin to Ground will add noise immunity to prevent accidental turn on due
to noise on the supply line.
RESET FLAG
The RESET pin is an open collector output which requires an external pull-up resistor to develop the reset signal.
The external pull-up resistor should be in the range of 10 kΩ to 200 kΩ.
At V
IN
values of less than typically 2V the RESET pin voltage will be high. For V
IN
values between typically 2V
and approximately V
OUT
+ V
BE
the RESET pin voltage will be low. For V
IN
values greater than approximately
V
OUT
+ V
BE
the RESET pin voltage will be dependent on the status of the V
OUT
pin voltage and the Delayed
Reset circuitry. The value of V
BE
is typically 600 mV at 25°C and will decrease approximately 2 mV for every 1°C
increase in the junction temperature. During normal operation the RESET pin voltage will be high .
Any load condition that causes the V
OUT
pin voltage to drop below typically 89% of normal will activate the
Delayed Reset circuit and the RESET pin will go low for the duration of the delay time.
Any line condition that causes V
IN
pin voltage to drop below typically V
OUT
+ V
BE
will cause the RESET pin to go
low without activating the Delayed Reset circuitry.
Excessive thermal dissipation will raise the junction temperature and could activate the Thermal Shutdown
circuitry which, in turn, will cause the RESET pin to go low.
For the LM9076BMA devices, pulling the SHUTDOWN pin high will turn off the output which, in turn, will cause
the RESET pin to go low once the V
OUT
voltage has decayed to a value that is less than typically 89% of normal.
See Figure 25.
RESET DELAY TIME
When the regulator output is switched On, or after recovery from brief V
OUT
fault condition, the RESET flag can
be can be programmed to remain low for an additional delay time. This will give time for any system reference
voltages, clock signals, etc., to stabilize before the micro-controller resumes normal operation.
This delay time is controlled by the capacitor value on the C
DELAY
pin. During normal operation the C
DELAY
capacitor is charged to near V
OUT
. When a V
OUT
fault causes the RESET pin to go low, the C
DELAY
capacitor is
quickly discharged to ground. When the V
OUT
fault is removed, and V
OUT
returns to the normal operating value,
the C
DELAY
capacitor begins charging at a typical constant 0.420 uA rate. When the voltage on the C
DELAY
capacitor reaches the same potential as the V
OUT
pin the RESET pin will be allowed to return high.
The typical RESET delay time can be calculated with the following formula:
t
DELAY
= V
OUT
X (C
DELAY
/ I
DELAY
) (1)
For the LM9076–3.3 with a C
DELAY
value of 0.001 uF and a I
DELAY
value of 0.420 uA the typical RESET delay
time is:
t
DELAY
=3.3V × (0.001 uF / 0.420 uA) = 7.8 ms (2)
For the LM9076–5.0 with a C
DELAY
value of 0.001 uF and a I
DELAY
value of 0.420 uA the typical RESET delay
time is:
t
DELAY
= 5.0V X (0.001uF / 0.420uA) = 11.9 ms (3)
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