Datasheet

LM87
www.ti.com SNAS034J –APRIL 2000–REVISED MARCH 2013
AC Electrical Characteristics
The following specifications apply for +2.8 V
DC
≤V
+
≤ +3.8 V
DC
on SMBCLK and SMBData, unless otherwise specified.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25°C.
(1)
Typical Limits Units
Symbol Parameter Conditions
(2) (3)
(Limits)
SERIAL BUS TIMING CHARACTERISTICS
t
1
SMBCLK (Clock) Period 2.5 μs (min)
t
rise
SMBCLK and SMBData Rise Time 1 μs (max)
t
fall
SMBCLK and SMBData Fall Time 300 ns (max)
t
2
Data In Setup Time to SMBCLK High 100 ns (min)
100 ns (min)
t
3
Data Out Stable After SMBCLK Low
300 ns (max)
t
4
SMBData Low Setup Time to SMBCLK Low (start) 100 ns (min)
t
5
SMBData High Hold Time After SMBCLK High 100 ns (min)
(stop)
31 ms
SMBCLK low time required to reset the Serial Bus
t
TIMEOUT
25 ms (min)
Interface to the Idle State
35 ms (max)
C
L
Capacitive Load on SMBCLK and SMBData 80 pF (max)
(1) Timing specifications are tested at the specified logic levels, V
IL
for a falling edge and V
IH
for a rising edge.
(2) Typicals are at T
J
= T
A
= 25 °C and represent most likely parametric norm.
(3) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
Figure 1. Serial Bus Timing Diagram
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