Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - temperature management Internal, External 2-wire serial, I²C/SMBus TSSOP 24

LM87

SNAS034J –APRIL 2000–REVISED MARCH 2013

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SMBALERT#

The INT# I/O pin can alternatively be configured as an SMBALERT# output in conjunction with the SMBALERT#

protocol. In this mode of operation, rather than connecting the INT# /ALERT# pin to the system interrupt inputs, it

will be connected to the SMBALERT# input pin on the SMBus host. When an INT#/ALERT# type error condition

is detected, this pin will notify the SMBus host that an SMBus device has an SMBALERT# condition. The SMBus

host will then access the bus using the Alert Response Address (ARA) which is 0001100b. Only the device

asserting the SMBALERT# signal will respond to the ARA, thus providing automatic identification of the device

generating the SMBALERT#. After acknowledging the slave address, the LM87 will disengage its SMBALERT#

output signal. For more information on the SMBALERT# protocol, please refer to the System Management Bus

specification. SMBALERT# is enabled by setting Bit 6 of the Alert Response Enable register at 80h.

THERM# Interrupts

The THERM# I/O pin is dedicated to temperature related error conditions. It includes a built in pull-up resistor to

minimize external components. The THERM# Enable bit, Bit 2 of Configuration Register 1 is used to enable the

THERM# output. The THERM# Clear bit, Bit 6 of Configuration Register 1, when set to 1, clears the THERM#

output. TheTHERM# output operates in two different modes when processing thermal error conditions, Default

Mode and ACPI Mode, selected by the state of the THERM# Interrupt Mode bit at Bit 3 of Configuration Register

2 (0 = Default, 1 = ACPI).

Default Mode:The THERM# ouput operates using a simple comparison of temperature with the corresponding

limit values. If any temperature value is outside a corresponding limit in registers 37h, 39h, 2Bh, 38h, 3Ah, or

2Ch, the THERM# output will go low. The output will remain asserted until it is reset by: reading Interrupt Status

THERM# is cleared by reading the status register, it may be set again after the next temperature reading, if the

temperature is still above the high limit. When THERM# is cleared by setting THERM#CLR, it cannot be re-

asserted until this bit is cleared. If THERM# is activated because a temperature value exceeds one of the

hardware limits in registers 13h, 14h, 17h, or 18h, or exceeds 126 degrees C, AOUT will be forced to the full

scale value. In this case, the THERM# output can only be cleared by setting the THERM#CLR bit or if the

temperature returns to 5 degrees below the hardware limit. Regardless of how THERM# is cleared, AOUT will be

maintained at the full scale value until the temperature returns to 5 degrees below the hardware limit that was

exceeded.

ACPI Mode: In ACPI mode, THERM# is only activated when temperatures exceed the high limit settings in

registers 13h, 14h, 17h, 18h or the safety limit of 126 degrees C. It will be de-asserted if the temperature returns

at least 5 degrees below the limit. While THERM# is asserted, AOUT will be driven to full scale to provide

maximum cooling from a variable speed fan.

THERM# also functions as an input. When an external active low signal is applied to THERM#, it will set the

THERM# input Interrupt Status Bit and will cause AOUT to go to full scale, regardless of the state of the

THERM# Input Interrupt Mask bit. If the Mask bit is cleared and INT# is enabled, an INT# will be generated. The

THERM# input function is not affected by the THERM# operating mode.

Fault Queue

A Fault Queue is incorporated in the external temperature monitoring sections of the LM87. This serves as a filter

to minimize false triggering caused by short duration or transient temperature events. The Fault Queue adds a

counter between the comparison logic and the Interrupt Status Register and THERM# output circuitry. The Fault

Queue has a depth of 3, so three consecutive readings outside of limits is required to set an external

temperature Interrupt Status Bit or generate a THERM# output. When the monitored temperature is returning

within limits, only one conversion within limits is required to clear the status bit. In other words, the fault queue is

only active when travelling outside of the limits, not when returning back within limits.

Product Folder Links: LM87