Datasheet

LM82
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SNIS113D JANUARY 2000REVISED MARCH 2013
Figure 10. T_CRIT_A output related circuitry logic diagram
Located in the Configuration Register are the mask bits for each temperature reading, see CONFIGURATION
REGISTER . When a mask bit is set, its corresponding status flag will not propagate to the T_CRIT_A output, but
will still be set in the Status Registers. Configuration register bits D5 and D3, labled Remote T_CRIT_A mask”
must be set high before the T_CRIT setpoint is lowered in order for the T_CRIT_A output to function properly.
Setting all four mask bits or programming the T_CRIT setpoint to 127°C will disable the T_CRIT_A output.
POWER ON RESET DEFAULT STATES
LM82 always powers up to these known default states:
1. Command Register set to 00h
2. Local Temperature set to 0°C
3. Remote Temperature set to 0°C until the LM82 senses a diode present between the D+ and D input pins.
4. Status Register set to 00h.
5. Configuration Register set to 00h; INT enabled and all T_CRIT setpoints enabled to activate T_CRIT_A.
6. Local and Remote T_CRIT set to 127°C
SMBus INTERFACE
The LM82 operates as a slave on the SMBus, so the SMBCLK line is an input (no clock is generated by the
LM82) and the SMBData line is bi-directional. According to SMBus specifications, the LM82 has a 7-bit slave
address. Bit 4 (A3) of the slave address is hard wired inside the LM82 to a 1. The remainder of the address bits
are controlled by the state of the address select pins ADD1 and ADD0, and are set by connecting these pins to
ground for a low, (0), to V
CC
for a high, (1), or left floating (TRI-LEVEL).
Therefore, the complete slave address is:
A6 A5 A4 1 A2 A1 A0
MSB LSB
and is selected as follows:
Address Select Pin State LM82 SMBus Slave Address
ADD0 ADD1 A6:A0 binary
0 0 001 1000
0 TRI-LEVEL 001 1001
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