Datasheet

LM81
www.ti.com SNAS011E –JUNE 1999–REVISED FEBRUARY 2002
AC ELECTRICAL CHARACTERISTICS
The following specifications apply for +2.8V
DC
≤ V+ ≤ +3.8V
DC
on SMBCLK and SMBData, unless otherwise specified.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25˚C. (See
(1)
)
SYMBOL PARAMETER TYP
(2)
LIMITS
(3)
UNIT
SERIAL BUS TIMING CHARACTERISTICS
t
1
SMBCLK (Clock) Period 2.5
t
rise
SMBCLK and SMBData Rise Time 1
t
fall
SMBCLK and SMBData Fall Time 300
t
2
Data In Setup Time to SMBCLK High 100
t
3
Data Out Stable After SMBCLK Low 0
t
4
SMBData Low Setup Time to SMBCLK Low (start) 100
t
5
SMBData High Hold Time After SMBCLK High (stop) 100
t
TIMEOUT
SMBData or SMBCLK low time required to reset the Serial Bus Interface to the Idle State 31 ms
25 ms (min)
35 ms (max)
C
L
Capacitive Load on SMBCLK and SMBData 400 pF (max)
(1) Timing specifications are tested at the specified logic levels, V
IL
for a falling edge and V
IH
for a rising edge.
(2) Typicals are at T
J
= T
A
= 25˚C and represent most likely parametric norm.
(3) Limits are ensured to TI’s AOQL (Average Outgoing Quality Level). Each 9-bit temperature and 8-bit input voltage conversion takes 50
ms typical and 56 ms maximum. Twelve bit temperature conversion takes 400 ms. Fan tachometer readings take 20 ms typical, at 4400
rpm, and 200 ms maximum.
Figure 4. Serial Bus Timing Diagram
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