Datasheet

LM81
SNAS011E –JUNE 1999–REVISED FEBRUARY 2002 www.ti.com
DC ELECTRICAL CHARACTERISTICS
(1)
(continued)
The following specifications apply for +2.8VDC ≤ V+ ≤ +3.8VDC, RS = 500Ω, unless otherwise specified. Boldface limits
apply for T
A
= T
J
= T
MIN
to T
MAX
; all other limits T
A
= T
J
= 25˚C.
SYMBOL PARAMETER TEST CONDITIONS TYPICAL
(2)
LIMITS LIMITS UNIT
LM81BIM
(3)
LM81CIM
(3)
V
OUT(0)
Logical “0” Output Voltage I
OUT
= −3.0 mA 0.4 0.4 V
(min)
I
OH
High Level Output Current V
OUT
= V+ 0.1 100 100 µA
(max)
RESET and Chassis Intrusion 45 20 20 ms
Pulse Width (min)
DIGITAL INPUTS: VID0–VID4, NTEST_IN, A0/NTEST_OUT, A1, Chassis Intrusion (CI)
V
IN(1)
Logical “1” Input Voltage 2.0 2.0 V
(min)
V
IN(0)
Logical “0” Input Voltage 0.8 0.8 V
(max)
SMBus DIGITAL INPUTS (SMBCLK, SMBData)
V
IN(1)
Logical “1” Input Voltage 2.1 1.4 V
(min)
V
IN(0)
Logical “0” Input Voltage 0.8 0.6 V
(max)
Tach Pulse Logic Inputs (FAN1, FAN2)
V
IN(1)
Logical “1” Input Voltage 0.7 x V+ 0.7 x V+ V
(min)
V
IN(0)
Logical “0” Input Voltage 0.3 x V+ 0.3 x V+ V
(max)
ALL DIGITAL INPUTS
I
IN(1)
Logical “1” Input Current V
IN
= V+ −0.005 -1 -1 µA
(min)
I
IN(0)
Logical “0” Input Voltage V
IN
= 0 V
DC
0.005 1 1 µA
(max)
C
IN
Digital Input Capacitance 20 pF
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