Datasheet

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LM81

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SNAS011E –JUNE 1999–REVISED FEBRUARY 2002

Model Number Frame Size Airflow CFM

109P08XXY601 3.15 in sq. X 0.79 in 23-30

(80 mm sq. X 20 mm)

109R08XXY401 3.15 in sq. X 0.98 in 21-42

(80 mm sq. X 25 mm)

REGISTERS AND RAM

ADDRESS REGISTER

The main register is the ADDRESS Register. The bit designations are as follows:

Bit Name Read/Write Description

7-0 Address Pointer Write Address of RAM and Registers. See the tables below for more

details.

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Address Pointer (Power On default 00h)

A7 A6 A5 A4 A3 A2 A1 A0

13.2 ADDRESS POINTER INDEX (A7–A0)

Registers and RAM A6–A0 in Hex Power On Value of Registers: Notes

<7:0> in Binary

Configuration Register 40h 0000 1000

Interrupt Status Register 1 41h 0000 0000

Interrupt Status Register 2 42h 0000 0000

Interrupt Mask Register 1 43h 0000 0000

Interrupt Mask Register 2 44h 0000 0000

CI Clear Register 46h 0000 0000

VID/Fan Divisor Register 47h <7:4> = 0101;

<3:0> = VID3–VID0

Serial Bus Address Register 48h <7:2> =0010 11; <1:0>

=(A!)(A0)

VID4 Register 49h <7:1> =1000 000;

<0> =VID4

Temperature Configuration 4Bh 0000 0001

Extended Mode Register 1 4Ch 0100 0100

Extended Mode Register 2 4Dh 0000 0000

Value RAM 19h–3Dh Address 19h default=1111 1111

Company ID 3Eh 0000 0001 This default designates Texas

Instruments.

Stepping 3Fh 0000 0011 Revisions of this device will start

with 1 and increment by one.

CONFIGURATION REGISTER — ADDRESS 40H

Power on default - <7:0> = 00001000 binary

Bit Name Read/Write Description

0 Start Read/Write A one enables startup of monitoring operations, a zero

puts the part in standby mode.

(1)

At start up, limit checking functions and scanning begin.

(2)

(1) The outputs of Interrupt pins will not be cleared if the user writes a zero to this location after an interrupt has occurred unlike “INT_Clear”

bit.

(2) All limits should be set in the Value RAM before setting this bit HIGH.

Product Folder Links: LM81