Datasheet

+
-
+ V
IN
2k
1:1
2k
Twisted
Pair Line
2k
100
1/2
LM7372
+
-
50
50
20uF
0.1uF
+
1/2
LM7372
V-
V+
0.1uF
5.1k
5.1k
1
3
2
8
7
6
5
4
0.1uF
- V
IN
20uF
0.1uF
+
LM7372
SNOS926E –MAY 1999–REVISED MARCH 2013 www.ti.com
Figure 28. Split Supply Application (SO PowerPAD)
PRINTED CIRCUIT BOARD LAYOUT and EVALUATION BOARDS
Generally, a good high-frequency layout will keep power supply and ground traces away from the inverting input
and output pins. Parasitic capacitance on these nodes to ground will cause frequency response peaking and
possible circuit oscillations (see Application Note OA-15 (SNOA367) for more information). Texas Instruments
suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and
characterization:
Device Package Evaluation Board PN
LM7372MA 16-Pin SOIC None
LM7372MR 8-Pin SO PowerPAD CLC730121
The DAP (die attach paddle) on the 8-Pin SO PowerPAD should be tied to V
−
. It should not be tied to ground.
See the respective Evaluation Board documentation.
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Product Folder Links: LM7372