Datasheet

-
+
+V
CC
-V
EE
V
OUT
V
IN
LM7341
SNOSAW9B –MAY 2008–REVISED MARCH 2013 www.ti.com
Figure 54. Non-Inverting Comparator
COMPARATOR WITH HYSTERESIS
The basic comparator configuration may oscillate or produce a noisy output if the applied differential input
voltage is near the comparator's offset voltage. This usually happens when the input signal is moving very slowly
across the comparator's switching threshold. This problem can be prevented by the addition of hysteresis or
positive feedback.
INVERTING COMPARATOR WITH HYSTERESIS
The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage
V
CC
of the comparator, as shown in Figure 55. When V
IN
at the inverting input is less than V
A
, the voltage at the
non-inverting node of the comparator (V
IN
< V
A
), the output voltage is high (for simplicity assume V
OUT
switches
as high as V
CC
). The three network resistors can be represented as R
1
||R
3
in series with R
2
. The lower input trip
voltage V
A1
is defined as
V
A1
= V
CC
R
2
/ ((R
1
||R
3
) + R
2
) (1)
When V
IN
is greater than V
A
(V
IN
> V
A
), the output voltage is low, very close to ground. In this case the three
network resistors can be presented as R
2
||R
3
in series with R
1
. The upper trip voltage V
A2
is defined as
V
A2
= V
CC
(R
2
||R
3
) / ((R
1
+ (R
2
||R
3
) (2)
The total hysteresis provided by the network is defined as
Delta V
A
= V
A1
- V
A2
(3)
For example to achieve 50 mV of hysteresis when V
CC
= 30V set R
1
= 4.02 kΩ, R
2
= 4.02 kΩ, and R
3
= 1.21 MΩ.
With these resistors selected the error due to input bias current is approximately 1 mV. To minimize this error it is
best to use low resistor values on the inputs.
18 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM7341