Datasheet

LM7171
www.ti.com SNOS760B –MAY 1999–REVISED MARCH 2013
For example, for the LM7171 in a SOIC-8 package, the maximum power dissipation at 25°C ambient
temperature is 730 mW.
Thermal resistance, θ
JA
, depends on parameters such as die size, package size and package material. The
smaller the die size and package, the higher θ
JA
becomes. The 8-pin DIP package has a lower thermal
resistance (108°C/W) than that of 8-pin SOIC (172°C/W). Therefore, for higher dissipation capability, use an 8-
pin DIP package.
The total power dissipated in a device can be calculated as:
P
D
= P
Q
+ P
L
(3)
P
Q
is the quiescent power dissipated in a device with no load connected at the output. P
L
is the power dissipated
in the device with a load connected at the output; it is not the power dissipated by the load.
Furthermore,
P
Q
: = supply current × total supply voltage with no load
P
L
: = output current × (voltage difference between supply voltage and output voltage of the same side of
supply voltage)
For example, the total power dissipated by the LM7171 with V
S
= ±15V and output voltage of 10V into 1 kΩ is
P
D
= P
Q
+ P
L
= (6.5 mA) × (30V) + (10 mA) × (15V − 10V)
= 195 mW + 50 mW
= 245 mW
Application Circuit
Figure 63. Fast Instrumentation Amplifier
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