Datasheet

LM611
SNOSC08C –MAY 1998–REVISED MARCH 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
Voltage on Any Pins Except V
R
(referred to V
−
pin) 36V (Max)
See
(3)
−0.3V (Min)
Current through Any Input Pin and V
R
Pin ±20 mA
Differential Input Voltage
Military and Industrial ±36V
Commercial ±32V
Storage Temperature Range −65°C≤T
J
≤+150°C
Maximum Junction Temperature 150°C
Thermal Resistance, Junction-to-Ambient
(4)
N Package 100°C/W
D Package 150°C/W
Soldering Information Soldering (10 seconds)
N Package 260°C
D Package 220°C
ESD Tolerance
(5)
±1 kV
(1) Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) More accurately, it is excessive current flow, with resulting excess heating, that limits the voltages on all pins. When any pin is pulled a
diode drop below V
−
, a parasitic NPN transistor turns ON. No latch-up will occur as long as the current through that pin remains below
the Maximum Rating. Operation is undefined and unpredictable when any parasitic diode or transistor is conducting.
(4) Junction temperature may be calculated using T
J
= T
A
+ P
D
θ
JA
. The given thermal resistance is worst-case for packages in sockets in
still air. For packages soldered to copper-clad board with dissipation from one op amp or reference output transistor, nominal θ
JA
is
90°C/W for the N package and 135°C/W for the D package.
(5) Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Operating Temperature Range
LM611AI, LM611I, LM611BI −40°C≤T
J
≤+85°C
LM611AM, LM611M −55°C≤T
J
≤+125°C
LM611C 0°C≤T
J
≤70°C
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