Datasheet

Q
g
C
HB
t
'V
HB
¸
¹
·
¨
©
§
Z
IN
G
= x
Z
S
2
1
Z
S
R
IN
+ ESR
+
V
IN
2
Z
IN
=
P
OUT
2S L
IN
x C
IN
1
f
S
=
Z
S
=
L
IN
C
IN
'V
IN
=
4 x 230 kHz x 15.4 PF
8A
= 0.565V
'V
IN
=
4 x x C
IN
SW
´
¶
I
OUT
LM5119/LM5119Q
SNVS676F –AUGUST 2010–REVISED FEBRUARY 2013 www.ti.com
(24)
(25)
The ripple voltage of the input capacitors will be reduced significantly with dual channel operation since each
channel operates 180 degrees out of phase from the other. Capacitors connected in parallel should be evaluated
for RMS current rating. The current will split between the input capacitors based on the relative impedance of the
capacitors at the switching frequency.
When the converter is connected to an input power source, a resonant circuit is formed by the line inductance
and the input capacitors. To minimize overshoot make C
IN
> 10 x L
IN
. The characteristic source impedance (Z
S
)
and resonant frequency (f
S
) are:
(26)
(27)
Where L
IN
is the inductance of the input wire. The converter exhibits negative input impedance which is lowest at
the minimum input voltage:
(28)
The damping factor for the input filter is given by:
(29)
Where R
IN
is the input wiring resistance and ESR is the equivalent series resistance of the input capacitors.
When δ = 1, the input filter is critically damped. This may be difficult to achieve with practical component values.
With δ < 0.2, the input filter will exhibit significant ringing. If δ is zero or negative, there is not enough resistance
in the circuit and the input filter will sustain an oscillation. When operating near the minimum input voltage, a bulk
aluminum electrolytic capacitor across C
IN
may be needed to damp the input for a typical bench test setup.
VCC CAPACITOR
The primary purpose of the VCC capacitor (C
VCC
) is to supply the peak transient currents of the LO driver and
bootstrap diode as well as provide stability for the VCC regulator. These peak currents can be several amperes.
The recommended value of C
VCC
should be no smaller than 0.47µF, and should be a good quality, low ESR,
ceramic capacitor located at the pins of the IC to minimize potentially damaging voltage transients caused by
trace inductance. A value of 1μF was selected for this design.
BOOTSTRAP CAPACITOR
The bootstrap capacitor between the HB and SW pins supplies the gate current to charge the high-side MOSFET
gate at each cycle’s turn-on and recovery charge for the bootstrap diode. These current peaks can be several
amperes. The recommended value of the bootstrap capacitor is at least 0.1μF, and should be a good quality, low
ESR, ceramic capacitor located at the pins of the IC to minimize potentially damaging voltage transients caused
by trace inductance. The absolute minimum value for the bootstrap capacitor is calculated as:
(30)
Q
g
is the high-side MOSFET gate charge and ΔV
HB
is the tolerable voltage droop on C
HB
, which is typically less
than 5% of VCC. A value of 0.47μF was selected for this design.
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