Datasheet

f
z
=
2 x S x R4 x C18
1
ESR
zero
=
2S x ESR x C
OUT
1
f
RHPzero
=
R
LOAD
(1 - D)
2
2S x L x D
f
P(MOD)
=
1 + D
MIN
2S x R
LOAD
x C
OUT
DCGain
(MOD)
=
R
LOAD
x V
IN
10R
S
(V
IN
+ 2V
OUT
)
LM5118, LM5118-Q1
www.ti.com SNVS566G –APRIL 2008–REVISED FEBRUARY 2013
ERROR AMPLIFIER CONFIGURATION
R4, C18, C17
These components configure the error amplifier gain characteristics to accomplish a stable overall loop gain. One
advantage of current mode control is the ability to close the loop with only three feedback components, R4, C18
and C17. The overall loop gain is the product of the modulator gain and the error amplifier gain. The DC
modulator gain of the LM5118 is as follows:
(26)
The dominant, low frequency pole of the modulator is determined by the load resistance (R
LOAD
) and output
capacitance (C
OUT
). The corner frequency of this pole is:
(27)
For this example, R
LOAD
= 4Ω, D
MIN
= 0.294, and C
OUT
= 454 µF, therefore:
f
P(MOD)
= 149 Hz
DC Gain
(MOD)
=3.63 = 11.2 dB
Additionally, there is a right-half plane (RHP) zero associated with the modulator. The frequency of the RHP zero
is:
(28)
f
RHPzero
= 7.8 kHz
The output capacitor ESR produces a zero given by:
(29)
ESR
ZERO
= 70 kHz
The RHP zero complicates compensation. The best design approach is to reduce the loop gain to cross zero at
about 30% of the calculated RHP zero frequency. The Type ll error amplifier compensation provided by R4, C18
and C17 places one pole at the origin for high DC gain. The 2nd pole should be located close to the RHP zero.
The error amplifier zero (see below) should be placed near the dominate modulator pole. This is a good starting
point for compensation. Refer to the on-line LM5118 Quick-Start calculator for ready to use equations and more
details.
Components R4 and C18 configure the error amplifier as a type II configuration which has a DC pole and a zero
at:
(30)
C17 introduces an additional pole used to cancel high frequency switching noise. The error amplifier zero
cancels the modulator pole leaving a single pose response at the crossover frequency of the loop gain if the
crossover frequency is much lower than the right half plane zero frequency. A single pole response at the
crossover frequency yields a very stable loop with 90 degrees of phase margin.
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