Datasheet

RES
RESTART
TIMER
HICCUP MODE
FAULT TIMER
256 CYCLES
RES
Current
STANDBY
HICCUP
Current Limit
Comparator
C
RES
+
-
LM5117
HO
LO
SS
RES
0V
1.25V RES Threshold
0.8V REF
Current Limit
Detected
Current Limit
persists during 256
consecutive cycles
t
SS
t
RES
I
RES
= 10 µA
I
SS
= 10 µA
10 PA
C
RES
x 1.25V
t
RES
=
[sec]
R
S
L
O
V
IN(MAX)
x t
ON(MIN)
+
I
LIM_PK
=
V
CS(TH)
[A]
LM5117, LM5117-Q1
SNVS698E APRIL 2011REVISED MARCH 2013
www.ti.com
where
t
ON(MIN)
is the minimum HO on-time (12)
In most cases, especially if the output voltage is relatively high, it is recommended that a soft-saturating inductor
such as a powder core device is used. If a sharp-saturating inductor is used, the inductor saturation level must
be above I
LIM_PK
. The temperatures of the NMOS devices, R
S
and inductor should be checked under this output
short condition.
Hiccup Mode Current Limiting
To further protect the regulator during prolonged current limit conditions, LM5117 provides a hiccup mode current
limit. An internal hiccup mode fault timer counts the PWM clock cycles during which cycle-by-cycle current
limiting occurs. When the hiccup mode fault timer detects 256 consecutive cycles of current limiting, an internal
restart timer forces the controller to enter a low power dissipation standby mode and starts sourcing 10μA current
into the RES pin capacitor C
RES
. In this standby mode, HO and LO outputs are disabled and the soft-start
capacitor C
SS
is discharged.
C
RES
is connected from RES pin to AGND and determines the time (t
RES
) in which the LM5117 remains in the
standby before automatically restarting. When the RES pin voltage exceeds the 1.25V RES threshold, RES
capacitor is discharged and a soft-start sequence begins. t
RES
can be calculated from the following equation:
(13)
Figure 27. Hiccup Mode Current Limit Timing Diagram
Figure 28. Hiccup Mode Current Limit Circuit
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