Datasheet

0
I
OUT
I
PP
f
SW
1
T=
¸
¹
·
¨
©
§
V
IN
I
PP
=
1 -
V
OUT
V
OUT
x
L
O
x f
SW
[A]
2
I
PP
I
L(MAX)_AVE
= I
L(MAX)_PK
-
[A]
V
OUT
f
SW
x A
S
x R
S
x R
RAMP
x C
RAMP
+ I
PP
-
V
CS(TH)
R
S
I
L(MAX)_PK
=
[A]
10 µA
C
SS
x 0.8V
t
SS
=
[sec]
LM5117, LM5117-Q1
www.ti.com SNVS698E –APRIL 2011–REVISED MARCH 2013
The diode emulation feature is configured with the DEMB pin. To enable diode emulation, connect the DEMB pin
to GND or leave the pin floating. If continuous conduction operation is desired, the DEMB pin should be tied to a
voltage greater than 3V and may be connected to VCC. The LM5117 forces the regulator to operate in diode
emulation mode when SS pin voltage is less than the internal 0.8V reference, allowing for startup into a pre-
biased load with the continuous conduction configuration.
Soft-Start
The soft-start feature allows the regulator to gradually reach the steady state operating point, thus reducing
startup stresses and surges. The LM5117 regulates the FB pin to the SS pin voltage or the internal 0.8V
reference, whichever is lower. The internal 10µA soft-start current source gradually increases the voltage on an
external soft-start capacitor connected to the SS pin. This results in a gradual rise of the output voltage. Soft-start
time (t
ss
) can be calculated from the following equation:
(8)
The LM5117 can track the output of a master power supply during soft-start by connecting a voltage divider from
the output of master power supply to the SS pin. At the beginning of the soft-start sequence, V
SS
should be
allowed to go below 25mV by the internal SS pull-down switch. During soft-start period, when SS pin voltage is
less than 0.8V, the LM5117 forces diode emulation for startup into a pre-biased load. If the tracking feature is
desired, connect the DEMB pin to GND or leave the pin floating.
Cycle-by-Cycle Current Limit
The LM5117 contains a current limit monitoring scheme to protect the regulator from possible over-current
conditions as shown in Figure 24. If the emulated ramp signal exceeds 1.2V, the present cycle is terminated. For
the case where the switch current overshoots when the inductor is saturated or the output is shorted to ground,
the sample-and-hold circuit detects the excess recirculating current before the high-side NMOS driver is turned
on again. The high-side NMOS driver is disabled and will skip pulses until the current has decayed below the
current limit threshold. This approach prevents current runaway conditions since the inductor current is forced to
decay to a controlled level following any current overshoot. Maximum peak inductor current can be calculated as:
(9)
where
• I
PP
represents inductor peak to peak ripple current in Figure 26, and is defined as: (10)
(11)
Figure 26. Inductor Current
During an output short condition, the worst case peak inductor current is limited to:
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