Datasheet

F
P2
=
1
C
COMP
x C
HF
C
COMP
+ C
HF
2S x R
COMP
x
¹
·
©
§
[Hz]
2Sx R
COMP
x C
COMP
1
F
Z
=
[Hz]
F
P1
= 0 [Hz]
V
OUT
COMP
FB
LM5117
+
-
R
FB2
R
FB1
R
COMP
C
COMP
C
HF
REF
Error
Amplifier
Type 2 Compensation
Components
-+
PWM
Comparator
+
-
RAMP Generator
Output
(optional)
L
O
R
RAMP
x C
RAMP
x R
S
x A
S
K =
LM5117, LM5117-Q1
SNVS698E –APRIL 2011–REVISED MARCH 2013 www.ti.com
The selection of R
RAMP
and C
RAMP
can be simplified by adopting a K factor, which is defined as:
where
• A
S
is the current sense amplifier gain which is normally 10 (4)
By choosing 1 as the K factor, the regulator removes any error after one switching cycle and the design
procedure is simplified. See Application Information section for detailed information.
Error Amplifier and PWM Comparator
The internal high-gain error amplifier generates an error signal proportional to the difference between the FB pin
voltage and the internal precision 0.8V reference. The output of error amplifier is connected to the COMP pin
allowing the user to provide Type 2 loop compensation components, R
COMP
, C
COMP
and optional C
HF
.
Figure 25. Feedback Configuration and PWM Comparator
R
COMP
, C
COMP
and C
HF
configure the error amplifier gain and phase characteristics to achieve a stable voltage
loop gain. This network creates a pole at DC (F
P1
), a mid-band zero (F
Z
) for phase boost, and a high frequency
pole (F
P2
). The recommended range of R
COMP
is 2kΩ to 40kΩ. See Application Information section for detailed
information.
(5)
(6)
(7)
The PWM comparator compares the emulated current sense signal from Ramp Generator to the voltage at the
COMP pin through a 1.2V internal voltage drop and terminates the present cycle when the emulated current
sense signal is greater than V
COMP
- 1.2V.
Diode Emulation
A fully synchronous buck regulator implemented with a freewheeling NMOS rather than a diode has the
capability to sink current from the output in certain conditions such as light load, over-voltage or pre-bias startup.
The LM5117 provides a diode emulation feature that can be enabled to prevent reverse current flow in the low-
side NMOS device. When configured for diode emulation, the low-side NMOS driver is disabled when SW pin
voltage is greater than -5mV during the off-time of the high-side NMOS driver, preventing reverse current flow.
A benefit of the diode emulation is lower power loss at no load or light load conditions. The negative effect of
diode emulation is degraded light load transient response.
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