Datasheet
V
RAMP
=
((V
IN
± V
OUT
) x g
m
+ I
OS
) x T
V
OUT
V
IN
C
RAMP
x
R
S
=
V
CS(TH)
I
OUT
+
V
OUT
x T
L
C
RAMP
=
I
OS
x L
V
OUT
x A x R
S
C
RAMP
=
g
m
x L
A x R
S
x
1 +
5 - V
OUT
V
IN(MIN)
R
S
=
V
CS(TH)
I
OUT
-
V
OUT
x T
2 x L
+
1 -
V
OUT
V
IN(MIN)
V
OUT
x T
L
x
C
RAMP
=
g
m
x L
A x R
S
x
1 +
5 - V
OUT
V
IN(MAX)
R
S
=
V
CS(TH)
I
OUT
-
V
OUT
x T
2 x L
x
+
1 -
V
OUT
V
IN(MIN)
V
OUT
x T
L
1 +
5 - V
OUT
V
IN(MAX)
1 +
5 - V
OUT
V
IN(MIN)
x
LM5116
SNVS499G –FEBRUARY 2007–REVISED MARCH 2013
www.ti.com
board is recommended as a means to connect the quiet end (input voltage ground side) of the input filter
capacitors to the output filter capacitors and the PGND pin of the regulator. Connect all of the low power ground
connections (C
SS
, R
T
, C
RAMP
) directly to the regulator AGND pin. Connect the AGND and PGND pins together
through to a topside copper area covering the entire underside of the device. Place several vias in this underside
copper area to the ground plane.
The highest power dissipating components are the two power MOSFETs. The easiest way to determine the
power dissipated in the MOSFETs is to measure the total conversion losses (P
IN
- P
OUT
), then subtract the power
losses in the output inductor and any snubber resistors. The resulting power losses are primarily in the switching
MOSFETs.
If a snubber is used, the power loss can be estimated with an oscilloscope by observation of the resistor voltage
drop at both turn-on and turn-off transitions. Assuming that the RC time constant is << 1 / f
SW
.
P = C x V
2
x f
SW
(33)
The regulator has an exposed thermal pad to aid power dissipation. Selecting MOSFETs with exposed pads will
aid the power dissipation of these devices. Careful attention to R
DS(ON)
at high temperature should be observed.
Also, at 250 kHz, a MOSFET with low gate capacitance will result in lower switching losses.
Comprehensive Equations
CURRENT SENSE RESISTOR AND RAMP CAPACITOR
T = 1 / f
SW
, g
m
= 5 µA/V, A = 10 V/V. I
OUT
is the maximum output current at current limit.
General Method for V
OUT
< 5V:
(34)
(35)
General Method for 5V < V
OUT
< 7.5V:
(36)
(37)
Best Performance Method:
This minimizes the current limit deviation due to changes in line voltage, while maintaining near optimal slope
compensation.
Calculate optimal slope current, I
OS
= (V
OUT
/ 3) x 10 µA/V. For example, at V
OUT
= 7.5V, I
OS
= 25 µA.
(38)
Calculate V
RAMP
at the nominal input voltage.
(39)
For V
OUT
> 7.5V, install a resistor from the RAMP pin to VCC.
26 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM5116