Datasheet

HI
LI
V
SS
HO
HS
LO
HB
V
DD
SOIC-8
1
2
3
4
8
7
6
5
HI
LI
V
SS
HO
HS
LO
HB
V
DD
WSON-8
1
2
3
4
8
7
6
5
NRND
LM5109
SNVS369 –APRIL 2005 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
CONNECTION DIAGRAMS
Figure 1.
Table 1. PIN DESCRIPTION
Pin No.
Name Description Application Information
WSON-
SO-8
8
(1)
1 1 V
DD
Positive gate drive supply Locally decouple to V
SS
using low ESR/ESL capacitor located as close to IC as
possible.
2 2 HI High side control input The LM5109 HI input is compatible with TTL input thresholds. Unused HI input
should be tied to ground and not left open
3 3 LI Low side control input The LM5109 LI input is compatible with TTL input thresholds. Unused LI input
should be tied to ground and not left open.
4 4 V
SS
Ground reference All signals are referenced to this ground.
5 5 LO Low side gate driver output Connect to the gate of the low side N-MOS device.
6 6 HS High side source Connect to the negative terminal of the bootstrap capacitor and to the source of
connection the high side N-MOS device.
7 7 HO High side gate driver output Connect to the gate of the low side N-MOS device.
8 8 HB High side gate driver Connect the positive terminal of the bootstrap capacitor to HB and the negative
positive supply rail terminal of the bootstrap capacitor to HS. The bootstrap capacitor should be
placed as close to IC as possible.
(1) For WSON-8 package it is recommended that the exposed pad on the bottom of the LM5109 be soldered to ground plane on
the PCB board and the ground plane should extend out from underneath the package to improve heat dissipation.
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