Datasheet

HI
LI
V
SS
HO
HS
LO
HB
V
DD
1
2
3
4
8
7
6
5
HI
LI
V
SS
HO
HS
LO
HB
V
DD
1
2
3
4
8
7
6
5
DRIVER
DRIVER
LEVEL
SHIFT
UVLO
UVLO
HI
V
DD
LI
V
SS
HB
HO
HS
LO
HV
V
DD
LM5109A
SNVS412A APRIL 2006REVISED MARCH 2013
www.ti.com
Simplified Block Diagram
Connection Diagrams
Figure 1. 8-Lead SOIC Figure 2. 8-Lead WSON
See D Package See NGT0008A Package
PIN DESCRIPTIONS
Pin #
NAME DESCRIPTION APPLICATION INFORMATION
SOIC WSON
(1)
Locally decouple to V
SS
using low ESR/ESL capacitor located as
1 1 V
DD
Positive gate drive supply
close to IC as possible.
The HI input is compatible with TTL input thresholds. Unused HI input
2 2 HI High side control input
should be tied to ground and not left open
The LI input is compatible with TTL input thresholds. Unused LI input
3 3 LI Low side control input
should be tied to ground and not left open.
4 4 V
SS
Ground reference All signals are referenced to this ground.
5 5 LO Low side gate driver output Connect to the gate of the low-side N- MOS device.
Connect to the negative terminal of the bootstrap capacitor and to the
6 6 HS High side source connection
source of the high-side N-MOS device.
7 7 HO High side gate driver output Connect to the gate of the high-side N-MOS device.
(1) For WSON package it is recommended that the exposed pad on the bottom of the package be soldered to ground plane on the PCB
and the ground plane should extend out from underneath the package to improve heat dissipation.
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