Datasheet

HI
LI
V
SS
HO
HS
LO
HB
V
DD
1
2
3
4
8
7
6
5
HI
LI
V
SS
HO
HS
LO
HB
V
DD
1
2
3
4
8
7
6
5
DRIVER
DRIVER
LEVEL
SHIFT
UVLO
UVLO
HI
V
DD
LI
V
SS
HB
HO
HS
LO
HV
LM5107
SNVS333D –NOVEMBER 2004–REVISED MARCH 2013 www.ti.com
Simplified Block Diagram
Connection Diagrams
Figure 1. 8-Lead SOIC Figure 2. 8-Lead WSON
See D Package See NGT0008A Package
PIN DESCRIPTIONS
(1)
Pin #
Name Description Application Information
SOIC WSON
Locally decouple to V
SS
using low ESR/ESL capacitor located as
1 1 V
DD
Positive gate drive supply
close to IC as possible.
The LM5107 HI input is compatible with TTL input thresholds.
2 2 HI High side control input
Unused HI input should be tied to ground and not left open
The LM5107 LI input is compatible with TTL input thresholds. Unused
3 3 LI Low side control input
LI input should be tied to ground and not left open.
4 4 V
SS
Ground reference All signals are referenced to this ground.
5 5 LO Low side gate driver output Connect to the gate of the low side N-MOS device.
Connect to the negative terminal of the bootstrap capacitor and to the
6 6 HS High side source connection
source of the high side N-MOS device.
7 7 HO High side gate driver output Connect to the gate of the low side N-MOS device.
Connect the positive terminal of the bootstrap capacitor to HB and
High side gate driver positive
8 8 HB the negative terminal of the bootstrap capacitor to HS. The bootstrap
supply rail
capacitor should be placed as close to IC as possible.
(1) For WSON package it is recommended that the exposed pad on the bottom of the LM5107 be soldered to ground plane on the PCB
board and the ground plane should extend out from underneath the package to improve heat dissipation.
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