Datasheet

VDD
HB
HO
HS
LO
VSS
LI
HI
MSOP-
PowerPad-8
Exposed Pad
Connect to VSS
HO
3
HS
4
VDD
1
HB
2
8
LO
7
VSS
6
LI
5
HI
SO
PowerPad-8
WSON-10
1
2
3
4
9
6
7
8
VDD
HB
HO
HS HI
LI
VSS
LO
NC
5
10
NC
WSON-8
1
2
3
4 5
6
7
8VDD
HB
HO
HS HI
LI
VSS
LO
VDD
HB
HO
HS
LO
VSS
LI
HI
1
8
2
7
3
6
4 5
SOIC-8
LM5100A, LM5100B, LM5100C, LM5101A, LM5101B, LM5101C
SNOSAW2P –SEPTEMBER 2006–REVISED MARCH 2013 www.ti.com
Table 1. Input/Output Options
Part Number Input Thresholds Peak Output Current
LM5100A CMOS 3A
LM5101A TTL 3A
LM5100B CMOS 2A
LM5101B TTL 2A
LM5100C CMOS 1A
LM5101C TTL 1A
Connection Diagrams
PIN DESCRIPTIONS
(1)
Pin #
SO MSOP-
Name Description Application Information
WSON- WSON-
SOIC-8 Power PowerPad
8
(1)
10
(1)
Pad-8 -8
(1)
Positive gate Locally decouple to VSS using low ESR/ESL
1 1 1 1 1 VDD
drive supply capacitor located as close to the IC as possible.
Connect the positive terminal of the bootstrap
High-side gate
capacitor to HB and the negative terminal to HS. The
2 2 2 2 2 HB driver bootstrap
bootstrap capacitor should be placed as close to the
rail
IC as possible.
High-side gate Connect to the gate of high-side MOSFET with a
3 3 3 3 3 HO
driver output short, low inductance path.
(1) Note: For WSON-8, WSON-10 and MSOP-PowerPad-8 package, it is recommended that the exposed pad on the bottom of the
package is soldered to ground plane on the PC board, and that ground plane should extend out from beneath the IC to help
dissipate heat. For WSON-10 package, pins 5 and 6 have no connection.
2 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM5100A LM5100B LM5100C LM5101A LM5101B LM5101C