Datasheet

VCC
R
RAMP
C
RAMP
RAMP
R
RAMP
=
V
VCC
- V
RAMP
I
OS
- 25 PA
C
RAMP
=
5 PA/V x 6.8 PH
10V/V x 10 m:
= 340 pF
C
RAMP
=
g
m
x L
A x R
S
5V
6.8 PH x 250 kHz
(1 + 0.1) x (7A + 0.5 x 2.8) +
R
S
=
=
V
OUT
L x f
SW
(1 + margin) x (I
OUT
+ 0.5 x I
PP
) +
V
CS

/A
0.12
#
10 m:
LM5088, LM5088-Q1
SNVS600H –DECEMBER 2008–REVISED MARCH 2013 www.ti.com
(12)
Some ‘margin’ beyond the maximum load current is recommended for the current limit threshold. In this design
example, the current limit is set at 10% above the maximum load current, resulting in a R
S
value of 10 mΩ. The
CS and CSG pins should be Kelvin connected to the current sense resistor.
RAMP CAPACITOR
With the inductor and sense resistor value selected, the value of the ramp capacitor (C
RAMP
) necessary for the
emulation ramp circuit is given by:
where
• L is the value of the output inductor
• gm is the ramp generator transconductance (5 µA/V)
• A is the current sense amplifier gain (10V/V) (13)
For the current design example, the ramp capacitor is calculated as:
(14)
The next lowest standard value 270 pF was selected for C
RAMP
. An NPO capacitor with 5% or better tolerance is
recommended. It should be noted that selecting a capacitor value lower than the calculated value will increase
the slope compensation. Furthermore, selecting a ramp capacitor substantially lower or higher than the
calculated value will also result in incorrect PWM operation.
For VOUT > 5V, internal slope compensation provided by the LM5088 may not be adequate for certain operating
conditions especially at low input voltages. A pull-up resistor may be added from VCC to RAMP the pin to
increase the slope compensation. Optimal slope compensation current may be calculated from
I
OS
= V
OUT
x 5 µA/V (15)
and R
RAMP
is given by
(16)
Figure 24. Additional Slope Compensation for VOUT > 5V
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