Datasheet

1
2
3
4 5
8
7
6
FB
PGATE
ISEN
GND
VCC
ADJ
RT
VIN
8
7
6
5
4
3
2
1
Exposed Pad on Bottom
Connect to Ground
FB
GND
ADJ
PGATE
ISEN
VCC
RT
VIN
1
2
3
4 5
8
7
6
Exposed Pad on Bottom
Connect to Ground
FB
PGATE
ISEN
GND
VCC
ADJ
RT
VIN
LM5085, LM5085-Q1
SNVS565G –NOVEMBER 2008–REVISED MARCH 2013 www.ti.com
Connection Diagram
Figure 1. Top View Figure 2. Top View
8-Lead HVSSOP-8 8-Lead WSON
Figure 3. Top View
8-Lead VSSOP
Pin Descriptions
Pin Name Description Application Information
No.
1 ADJ Current Limit Adjust The current limit threshold is set by an external resistor from VIN to ADJ in
conjunction with the external sense resistor or the PFET’s R
DS(ON)
.
2 RT On-Time Control and Shutdown An external resistor from VIN to RT sets the buck switch on-time and switching
frequency. Grounding this pin shuts down the controller.
3 FB Voltage Feedback From the Input to the regulation and over-voltage comparators. The regulation level is 1.25V.
Regulated Output
4 GND Circuit Ground Ground reference for all internal circuitry
5 ISEN Current Sense Input for Current Connect to the PFET drain when using R
DS(ON)
current sense. Connect to the PFET
limit Detection. source and the sense resistor when using a current sense resistor.
6 PGATE Gate Driver Output Connect to the gate of the external PFET.
7 VCC Output of the gate driver bias Output of the negative voltage regulator (relative to VIN) that biases the PFET gate
regulator driver. A low ESR capacitor is required from VIN to VCC, located as close as
possible to the pins.
8 VIN Input Supply Voltage The operating input range is from 4.5V to 75V. A low ESR bypass capacitor must be
located as close as possible to the VIN and GND pins.
EP Exposed Pad Exposed pad on the underside of the package (HVSSOP and WSON only). This pad
is to be soldered to the PC board ground plane to aid in heat dissipation.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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