Datasheet
R4 =
V
RIP(min)
I
OR(min)
FB
LM5085
PGATE
GND
Q1
L1
Cff
C
OUT
R
FB2
R
FB1
V
OUT
GND
D1 R4
Cff =
3 x t
ON(max)
(R
FB1
//R
FB2
)
R4 =
25 mV
I
OR(min)
LM5085, LM5085-Q1
www.ti.com
SNVS565G –NOVEMBER 2008–REVISED MARCH 2013
Alternate Output Ripple Configurations
The minimum ripple configuration, employing C1, C2, and R3 in Figure 28, results in a low ripple amplitude at
V
OUT
determined mainly by the characteristics of the output capacitor and the ripple current in L1. This
configuration allows multiple ceramic capacitors to be used for V
OUT
if the output voltage is provided to several
places on the PC board. However, if a slightly higher level of ripple at V
OUT
is acceptable in the application, and
distributed capacitance is not used, the ripple required for the FB comparator pin can be generated with fewer
external components using the circuits shown below.
a) Reduced ripple configuration: In Figure 33, R3, C1 and C2 are removed (compared to Figure 28). A low
value resistor (R4) is added in series with C
OUT
, and a capacitor (Cff) is added across R
FB2
. Ripple is generated
at V
OUT
by the inductor’s ripple current flowing through R4, and that ripple voltage is passed to the FB pin via Cff.
The ripple at V
OUT
can be set as low as 25 mVp-p since it is not attenuated by R
FB2
and R
FB1
. The minimum
value for R4 is calculated from:
(33)
where I
OR(min)
is the minimum ripple current, which occurs at minimum input voltage. The minimum value for Cff
is determined from:
(34)
where t
ON(max)
is the maximum on-time, which occurs at minimum VIN. The next larger standard value capacitor
should be used for Cff.
Figure 33. Reduced Ripple Configuration
b) Lowest cost configuration: This configuration, shown in Figure 34, is the same as Figure 33 except Cff is
removed. Since the ripple voltage at V
OUT
is attenuated by R
FB2
and R
FB1
, the minimum ripple required at V
OUT
is
equal to:
V
RIP(min)
= 25mV x (R
FB2
+ R
FB1
)/R
FB1
(35)
The minimum value for R4 is calculated from:
(36)
where I
OR(min)
is the minimum ripple current, which occurs at minimum input voltage.
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