Datasheet

LM5072
www.ti.com SNVS437D –MARCH 2006–REVISED APRIL 2013
7. C26 should be placed directly across the SS and ARTN pins.
8. C21 should be placed directly across the nPGOOD and ARTN pins.
9. R25 should be directly routed from the output port.
10. R9 should be directly routed from R14/R15.
11. D6 and Z1 should be placed to achieve the shortest connection from C4 or C5 to the drain pad(s) of Q1 for
better snubbing.
12. C2 and R4 should be placed to achieve the shortest connection across D5.
13. Q1, D5, D8, and U1 (LM5072) should be installed on thermal pads having adequate thermal vias down
through all PCB Layers and an exposed thermal pad on the other side of the PCB.
14. Avoid spiral trace pattern.
15. Avoid placing switching traces near any traces in the regulator feedback loop.
16. Pay attention to trace width. Try to make the power traces as wide as possible. Conversely, do not make
signal traces wider than needed.
After the first placement and routing is completed, make necessary modifications to optimize the design.
Application Example #1
Figure 31 shows an application example of a single isolated output solution for the PD. Both front auxiliary
(FAUX) and rear auxiliary (RAUX) power options are given, although only one option may be needed in practice.
Note that for the RAUX option, D2 is only installed when the supply voltage of the auxiliary power source would
cause the V
IN
voltage to be below 14.5V.
Figure 31. PD with Isolated, Single Output Solution
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